SoC makes grab at tapeless camcorder market
By Ron Wilson, EE Times
February 23, 2004 (10:25 a.m. EST)
San Mateo, Calif. - Fabless startup MediaWorks Integrated Systems Inc. bills an upcoming system-on-chip as having virtually everything an ODM needs to build a solid-state camcorder.
By applying an array of configurable RISC processors to solve what is normally seen as an ASIC problem, MediaWorks skirted a burgeoning array of codec standards that renders application-specific chips a crapshoot. The move gives MediaWorks (Irvine, Calif.) a chance to seize a chunk of the boomlet in solid-state DVD camcorders, a market now gathering momentum in Taiwan and one that could be explosive by Christmas. Philip Lavee, vice president of marketing and sales at MediaWorks, credits MPEG-4 video compression for providing the SoC option. "For the first time," he said, "it is possible to store a reasonable amount of DVD-quality video on a flash card or an inexpensive disk-say, an hour on a 512-Mbyte card. At the same time, new pixel-averaging technology from the sensor vendors means that we can now get D1-resolution images out of CCD and CMOS sensors at 30 frames/second."
MediaWorks is jumping on the bandwagon early, preparing to tape out its SoC, which combines a software MPEG-4 codec and Advanced Audio Coding codec with an image sensor interface, system controller and storage interfaces-essentially all an ODM needs for a solid-state camcorder.
An MPEG-4 codec would usually be built either as dedicated ASIC circuitry, as a programmable SIMD engine or using a conventional DSP chip with an accelerator, Lavee said. "But there is too much flux in the codec standards right now to risk an ASIC," he said.
So MediaWorks turned instead to a heterogeneous array of configurable RISC processor cores from Tensilica. "We use five processors," CTO Eric Collins said: four with added instructions optimized for MPEG-4 execution and a fifth with extensions for audio codec execution and duties as the system controller.
Each processor has local instruction and data caches and a local data RAM, Collins said, and they share a DDR SDRAM controller. "To keep the memory working efficiently and to avoid stalls, we have put a great deal of work into fetching ahead blocks from the video stream to have them in place when each processor needs them."Variable interface
The chip includes an interface that can adapt to a number of the new fast-transfer CCD and CMOS image sensors.
The chip will tape out for United Microelectronics Corp.'s 0.13-micron process. The company expects to receive samples in May and to deliver production volumes by the end of August. In quantity, the chip will cost just under $20 each. Four volume ODMs have been lined up, Lavee said, and MediaWorks is engaged with their choices of sensor, lens and display vendors to make sure the interfaces and drivers are in place.
"One valuable thing about the Tensilica methodology is that the applications software is developed slightly ahead of, but with, the hardware architecture," Collins said. That means that the codecs and control software are essentially ready to go. The process starts with the application code; then, after extensive system modeling and optimization, it outputs Verilog into a correct-by-construction synthesis/verification flow. "We take that to a conventional cell-based back end and thence to tapeout," he said.
Lavee said he expects his four initial customers to have products on the shelves by Christmas. While MediaWorks has little word on how customers will price their products, Lavee said that shoppers will likely see low-end CMOS cameras-essentially digital still cameras with extended DVD- quality record capability-for as little as $250. Another $100 or so would buy a camera with CCD imaging and a power zoom. But the paradigm for the solid-state camcorders, he believes, will be much more as an extension to the still camera market than as a lookalike for tape-based camcorders.