Startups give programmability a twist By Anthony Cataldo, EE Times
March 9, 2004 (1:42 p.m. EST)
It may not be as easy for startup chip companies to get venture capital funding as it was a few years ago, but there is still money to be had. Among the new players that have demonstrated a knack for getting VCs to pony up investment dollars are those that tout programmability.
There's a fine line these companies must walk. On the one hand, they must promote the flexibility of their architecture relative to fixed-function ASICs. But most are careful not to position themselves as direct competitors of programmable logic vendors, even if they believe they have a technical advantage.
Two years ago, Leopard Logic Inc. was ready to take on FPGAs with a programmable logic architecture that sported a new, faster kind of interconnect using point-to-point wiring. The allure of capturing a piece of the FPGA pie was too great to resist. "Everyone knows it's a huge market," said president and CEO Chris Phillips.
But the company soon realized that making FPGAs would be a $100 million exercise, a price that investors would not countenance during the market nosedive. That forced Leopard to change course for "something fundable," Phillips said. The final outcome: a hybrid architecture that blends programmable logic cells with smaller, functionally equivalent mask-programmable cells.
Indeed, the market is strewn with the wreckage of FPGA startups. DynaChip, which came out with a novel interconnect structure, closed up and sold most of its assets to Xilinx in 1999. A more recent casualty was Chameleon Systems, which was trying to promote reconfigurable computing in wireless-communications infrastructure gear.
Ideas that are most likely to sell days the ones that claim an advantage in the development stages. QuickSilver Technology Inc. lets users describe the algorithms in a variation of C that can then be mapped into an array of ready-made reconfigurable computing engines, each with its own algorithmic specialty. Leopard Logic Inc. lets designers use existing methodologies and tools; the only proprietary tool is one that takes in a netlist to generate the mask data and FPGA bit stream prior to production.
Others are homing in on niches. MathStar Inc. uses an array of 16-bit hardware "objects" that are strung together over a two-tiered communications line, which is said to allow the device to run as high as 1 GHz. The company targets applications that need performance but don't sell in large volumes, such as radar systems. "If you have a performance advantage, there is a class of people that have to listen," said Dean Westman, vice president of marketing.
FPGA players don't seem to consider these companies a real threat--yet. Xilinx and Leopard Logic, for example, are both listed as suppliers on distributor Avnet's line card. But you won't find many distributors carrying both Altera and Xilinx.