English
Xelic Announces Frame Mapped Generic Framing Procedure Core Availability for Integration into ASIC or FPGA Networking Applications
Rochester, NY -- March 25, 2004 -- Xelic, Inc., a leading provider of Engineering Design Services and Networking Intellectual Property today announced the immediate availability of their Frame Mapped GFP Core (XCGFPFM) for product integration.
The XCGFPFM will encapsulate/de-encapsulate frame mapped client traffic which includes Ethernet, PPP, MAPOS, and proprietary packet types in compliance with the ITU-T G.7041/Y.1303 specification. Generic Framing Procedure (GFP) Transmit and Receive functions operate independently to provide full duplex communication. The XCGFPFM core supports data rates up to 2.5Gb/s and is suitable for both FPGA and ASIC implementations.
“Providing standards based cores such as the XCGFPFM allows our customers to concentrate on developing their own unique specialized IP that differentiates them from the rest,” said Doug Bush, Director of IP Development at Xelic. “In addition, we are able to better position our design services and provide our customers with the expertise required to expedite product development and shorten the time to market.”
Xelic cores are available under flexible single use or perpetual licensing terms and come complete with full documentation and a comprehensive suite of self-checking tests. Core customization and integration services are also available.
Xelic is a privately held standards based Intellectual Property provider and Engineering Services Company.
Xelic’s Engineering Services include Product Definition, ASIC/FPGA Development, System Design, Board Design, Firmware Design, and full turnkey solutions. Xelic offers IP for SONET/SDH, Digital Wrapper, Generic Framing Procedure, ATM, and Forward Error Correction. Xelic was founded in January of 2001 and is based out of Rochester, NY. For more information about Xelic, please visit www.xelic.com.
Xelic and XCGFPFM are trademarks of Xelic, Inc. All other trade names, trademarks, and registered trademarks are the property of their respective owners.
The XCGFPFM will encapsulate/de-encapsulate frame mapped client traffic which includes Ethernet, PPP, MAPOS, and proprietary packet types in compliance with the ITU-T G.7041/Y.1303 specification. Generic Framing Procedure (GFP) Transmit and Receive functions operate independently to provide full duplex communication. The XCGFPFM core supports data rates up to 2.5Gb/s and is suitable for both FPGA and ASIC implementations.
“Providing standards based cores such as the XCGFPFM allows our customers to concentrate on developing their own unique specialized IP that differentiates them from the rest,” said Doug Bush, Director of IP Development at Xelic. “In addition, we are able to better position our design services and provide our customers with the expertise required to expedite product development and shorten the time to market.”
Xelic cores are available under flexible single use or perpetual licensing terms and come complete with full documentation and a comprehensive suite of self-checking tests. Core customization and integration services are also available.
Xelic is a privately held standards based Intellectual Property provider and Engineering Services Company.
Xelic’s Engineering Services include Product Definition, ASIC/FPGA Development, System Design, Board Design, Firmware Design, and full turnkey solutions. Xelic offers IP for SONET/SDH, Digital Wrapper, Generic Framing Procedure, ATM, and Forward Error Correction. Xelic was founded in January of 2001 and is based out of Rochester, NY. For more information about Xelic, please visit www.xelic.com.
Xelic and XCGFPFM are trademarks of Xelic, Inc. All other trade names, trademarks, and registered trademarks are the property of their respective owners.
|
||||||
Related News
- Xelic Announces SONET/SDH Tributary Payload Processor Core Availability for Integration into ASIC or FPGA Networking Applications
- Xelic Announces Family of SONET/SDH Transport Processor Cores for Integration into FPGA or ASIC Networking Applications
- Lightwaves Systems Selects Xelic to Provide Frame Mapped GFP Core for Integration into Networking Application
- GiDEL Announces The Availability Of TotalHistory, A New Level in ASIC Prototyping and FPGA Debug
- Xelic Announces Availability of 40G Enhanced Forward Error Correction Core for Optical Transport Networking Applications
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
|
E-mail This Article | 
|
|
Printer-Friendly Page |