NewLogic Technologies Names New Head of R&D
Axel Jahnke assigned as VP Research and Development
Lustenau, Austria; March 25th, 2004 - NewLogic Technologies, a leading supplier of wireless intellectual property (IP) cores and design services, named Axel Jahnke as Vice President in charge of Research and Development, effective March 2004.
Axel Jahnke joined NewLogic in January 2003 for heading the design center in Munich, Germany. In his new position he will be responsible for developing and leading the activities of all the company's research and development centers and engineering staff.

NewLogic employs more than 180 highly qualified digital, analog and RF engineers based in Lustenau (Austria), Sophia-Antipolis (France), Munich (Germany) and in the recently opened Design Center in Geneva (Switzerland). The company has also subsidiaries in San Jose/US and Singapore.
Axel Jahnke's background includes more than 11 years executive R&D experience in the global semiconductor industry. Before joining NewLogic Axel held R&D management positions at Infineon Technologies and Multilink Technology. He holds a masters degree in Electrical Engineering from the Technical University of Berlin, Germany."Axel's management experience provides significant leadership for our engineering team securing the timely execution of our customer design service projects and our internal IP development", Hans-Peter Metzler, President and CEO, commented."Especially for our WLAN system IP, he will ensure that the company maintains and further expands its technological leadership".
About NewLogic Technologies
NewLogic Technologies, headquartered in Lustenau, Austria, is a leading global supplier of IEEE 802.11 Wireless LAN and Bluetooth intellectual property (IP) cores and next generation cellular technology. In addition NewLogic offers IC design and IP Integration to help its customers achieve their aggressive time to market goals.
|
Related News
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |