IBM ASIC Customers to Access DDR1/DDR2 Controllers for 90nm and 130nm Copper
Palo Alto, Calif., April 19, 2004 -- Denali Software, Inc., the leading provider of semiconductor intellectual property (IP) and electronic design automation (EDA) tools for chip interface design and verification, today announced it has signed an agreement enabling IBM to sublicense Denali's Databahn(TM) IP to its ASIC customers, and for internal use on its own chip development efforts.
The agreement covers Databahn memory controller cores for DDR1 and DDR2 technology on IBM's 90 nm Cu-08 and 130 nm Cu-11 processes. The flexibility of the Databahn memory controller to support multiple configurations and memory architectures is accomplished through a synthesizable core. Support of high-performance applications is possible by hardening critical timing circuits such as Denali's proprietary Delay Compensation Circuitry (DCC).
"Integrating third party IP such as Denali's Databahn memory controller into our ASIC offering allows us to provide our customers with a broad choice of IP solutions to meet their design requirements," said Tom Reeves, vice president, ASIC product group, IBM Systems and Technology Group.
Adds Lane Mason, memory market analyst for Denali: "Having an ASIC market leader like IBM license the Databahn DDR controller core underscores Denali's success in the IP marketplace. IBM customers can now leverage best-in-class memory controller IP that is well integrated and proven in the IBM's latest ASIC flow."
About Databahn Memory Controller IP
Licensed for use in more than 100 designs by leading semiconductor and system companies, with over 25 chips in production, Databahn is the industry leading memory controller IP solution. Databahn cores are configurable for a wide range of performance and power requirements, as well as ASIC interfaces. To ensure compatibility with all the latest high-speed memory technologies, the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest DDR1, DDR2, and SDRAM devices from all major memory vendors. Deliverables include: RTL and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, programmable register settings, and documentation. The silicon-proven Databahn IP is library independent and covers solutions from .18-micron to .08-micron technologies, and DRAM device frequencies from 100-400MHz (200-800MHz data rate).
About Denali Software, Inc.
Denali Software Inc. is the world's leading provider of electronic design automation (EDA) software and Semiconductor Intellectual Property (SIP) solutions for chip interface design, integration, and verification. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. Corporate headquarters are located at: 1850B Embarcadero Road, Palo Alto, Calif. 94303. For more information, visit Denali at www.denali.com. Or, contact Denali by phone at: (650) 461-7200.
The Denali logo, Databahn, eMemory, MMAV, and PureSpec are trademarks of Denali Software Inc. All other trademarks are the property of their respective owners.