Porto Salvo, Portugal – 19 April 2004, ChipIdea Microelectrónica, S.A., a leading analog and mixed-signal IP and SOC solutions provider, announces the silicon validation of CI3261Ba - a dual 12-bit 50MS/s pipeline ADC in a compact footprint (3.96mm2) that features competitive power dissipation (180mW) and dynamic performance suitable for emerging Broadband Communications (e.g. Multi-Antenna WiFi) as well as Imaging and Instrumentation Applications.
The dual ADC is designed in 0.25um, 1P3M, MiM, 2.5V CMOS technology and includes internally generated references. Operated at 50MS/s, it exhibits 0.3 LSB DNL, 1 LSB INL, 69 dB SNR and –78 dB THD leading to a global performance of 11.1 effective bits (ENOB).
For details, please visit
http://www.chipidea.com/website_45c/ciflash/2004_4/flashnews200404.html
