SANTA CLARA, Calif., May 10, 2004
– Legend Design Technology, Inc., a provider of semiconductor IP characterization and simulation software, today announced that the CharFlo-Memory! software has been extended to CharFlo-Memory!-TD for semiconductor process optimization, verification, and statistical characterization. The purpose is to enhance the productivity and yields of process development for deep-submicron and nanometer technology. Legend’s methods and apparatuses there have been patent-pending.
Nowadays, the process development is accelerated and high performance is required. To complement costly DOE (Design of Experiments) on silicon, using the software tools to enhance productivity and yields is a must, just like what happened in pharmaceutical industry.
Not only memory increasingly dominates most of chip areas, but also memory is the best test vehicle for process development. Having been successfully used as a ‘push-button’ tool for memory characterization, Legend’s CharFlo-Memory! software has been further extended for process development to meet ‘time-to-market’ requirement.
For process verification, CharFlo-Memory!-TD provides electrical measurements of timing, power, maximum frequency, and the reliability etc. After process parameters converted to SPICE models, CharFlo-Memory!-TD with MSIM circuit simulator can verify the impact of any process change quickly and accurately.
As a pseudo-DOE (Design of Experiments) tool, CharFlo-Memory!-TD performs process optimization by characterizing and simulating the test circuits over the combinations of process parameters. The sweet spots can then be located with the results correlated with silicon measurement.
As for statistical characterization, CharFlo-Memory!-TD inputs statistical SPICE models reflecting the distributions of process parameters, and then produces the statistical results of electrical measurements from characterization and simulation. Analyzing the distribution of those statistical results such as sense-amplifier input (reliability) against noise margin always help predicting the yields.
Patrick Lin, Chief SOC Architect at UMC, commented, "For the ‘what-if’ analysis on any PVT corner, Legend’s CharFlo-Memory! has automated the characterization task and accomplished it accurately and efficiently. UMC now has the means to easily verify the impact a process change might have on memory IP function and reliability.”
“Legend’s memory characterization tool has been well proven not only in characterizing designs, but also in enhancing the productivity and yields of process development, especially for deep-submicron and nanometer technology.” said Dr. You-Pang Wei, president and chief executive officer of Legend Design Technology. “I am pleased to see that CharFlo-Memory!-TD helps bridging the gap between process development and design realization, shortening development cycle and enhancing production yields.”.About Legend Design Technology, Inc.
Legend Design Technology, Inc. is a leading provider of characterization and simulation software for semiconductor Intellectual Property (IP) blocks in the SoC designs. With an emphasis on productivity and value, Legend’s CharFlo-Memory! toolset revolutionizes the time consuming and error prone processes associated with characterization. MSIM is Legend’s high-accuracy SPICE circuit simulator with great convergence and extensive model support. Turbo-MSIM is Legend’s high-speed and high-capacity circuit simulator ideal for timing and power simulation, and function verification. Both simulators are well designed for nanometer technology challenges, and provide excellent price-performance. For more information, visit www.LegendDesign.com