AccelChip and Leopard Logic Join Forces to Target DSP Market with Configurable Logic Devices

MILPITAS, CA, May 27, 2004 – AccelChip Inc., the industry’s only provider of automated flows from MATLAB® algorithms to silicon, today announced Leopard Logic as the latest participant in its AccelChip Silicon vendor Alliance Program (ASAP). Under this agreement AccelChip® DSP Synthesis tools will be extended to support Leopard Logic’s Gladiator™ CLD™ configurable logic devices to offer mutual customers a complete DSP flow that allows them to take designs seamlessly from FPGA prototyping into production using Gladiator CLD.

ASAP provides an optimized tool flow that allows customers to quickly evaluate various implementation options from multiple vendors based on a standardized MATLAB tool flow. Under the terms of the program, AccelChip will extend the patented device-specific optimization engine inside its algorithmic synthesis tool in order to provide highly optimized results for Leopard Logic’s device family. When combined with AccelChip’s AccelWare® DPS parametric libraries for signal processing, communications and image processing, and industry-standard design flow, designers targeting Gladiator CLD devices will now have a highly optimized, top-down, language-based flow for DSP design.

“With the rapid growth in the DSP design, customers require solutions that enable fast silicon implementation from high abstraction levels and high-performance intellectual property,” said Stefan Tamme, vice president of Sales & Marketing of Leopard Logic. “AccelChip’s toolset satisfies both these needs--first by providing rapid design exploration targeting performance, area, and cost tradeoffs, and secondly with their AccelWare libraries, which provide the key DSP building blocks required for communications, signal processing and image processing designs. This combination is an extraordinary addition to our flow.”

“The Gladiator CLD family is the first device that combines FPGA and ASIC logic into a fully user-customizable device. In addition to this innovative architecture, Leopard Logic has done an outstanding job putting together a comprehensive RTL flow to support it,” said Dan Ganousis, president and CEO of AccelChip Inc. “By working with AccelChip, they are now able to extend this flow into the DSP market without incurring the development expenses for a proprietary flow.”

AccelChip solutions support industry-standard FPGA, ASIC, and structured ASIC design flows based on synthesis of technology-specific register-transfer level (RTL) VHDL and Verilog. A new version of AccelChip DSP Synthesis with support for the Gladiator CLD devices will be available in June 2004.

About the Companies

Leopard Logic is a fabless semiconductor company that has pioneered Gladiator CLD, a new class of configurable logic devices that combine FPGA and ASIC technologies in a 100% user customizable platform. The unique combination of Leopard Logic patented field-programmable and mask-programmable technology delivers unmatched performance and flexibility, short time-to-revenue and the lowest total-cost-of-ownership. Gladiator CLD devices can be used across a wide range of markets and applications requiring flexible logic solutions and are ideal for demanding applications in the networking, storage and digital consumer infrastructure markets. A comprehensive tool suite, first-class third party IP cores, and complete integration and design services complement the devices. For more information visit our website at www.leopardlogic.com.

AccelChip Inc. develops and markets a MATLAB-based architectural synthesis environment, intellectual property, and consulting services that enable a true, top-down DSP design. AccelChip's unique DSP Design Automation (DDA) solutions link the domain-specific DSP design environment with industry-standard FPGA, ASIC, and structured ASIC design flows and are proven to dramatically accelerate the DSP design cycle and increase the quality of results. Founded in 2000, AccelChip is located in Milpitas, California, and has design centers in Portland, Oregon, and Carlsbad, California. AccelChip's Web address is www.accelchip.com. For more information, contact Jayne Scheckla at (971) 204-0150 X240.

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AccelChip and AccelWare are registered trademarks of AccelChip Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies.