English
Jeda Technologies Announces PCI-X, SPI-4, Ethernet, ARM AMBA Verification IP at DAC
MOUNTAIN VIEW, Calif.—(BUSINESS WIRE)—June 6, 2004— Jeda Technologies announced the availability of various Verification IP at the 41st Design Automation Conference being held in San Diego during June 7-11. Jeda Technologies would be exhibiting in Booth #3332 at the San Diego Convention Center. This Verification IP has been developed using JedaX, the Object Oriented testbench automation tool developed by the company.
The Verification IP's generally referred to as Jeda-Plug-n-Play-Module (JPPM), are built around standard protocols and interfaces commonly used in the design of ASICs and FPGAs. These include the PCI-X, SPI-4 Phase 2, Ethernet, and ARM processor (AMBA) test bench environment.
"The whole idea behind SOC trend is to be able to use design IP developed by others. We at Spreadtrum have been using JedaX for our verification needs in the development of Wireless ASICS and had been very pleased with the experience. The availability of ready-made ARM AMBA verification environment can save us tremendous amount of effort that we otherwise have to expend," said Mr. Jin Ji, VP of SoC Design of Spreadtrum Communications.
PCI-X verification IP available from other sources is commonly written using Verilog/VHDL HDL. Verilog is a great language for designing chips but falls short when it comes to developing testbenches. It may be adequate for testing a PCI core stand alone, but when time comes to integrate that core with the rest of the system, it becomes very tedious to extend the verification code written by a third person in Verilog. The beauty of Object-Oriented JedaX based testbench is that they are compact, modular, reusable and easily extensible. "The PCI-X testbench couldn't have come at a better time for us. In our system we use standard interfaces. We would rather use our engineering resources for developing verification code for our value-add portion of design instead of standard interfaces. The PCI-X JPPM is exactly what we needed," expressed Mr. John Ding, Vice President and chief architect, at Exavio, a company developing video storage servers.
Jeda Technologies has also made available the verification IP for the standard SPI-4 phase 2 and Ethernet MAC for companies that are in the data networking or telecommunication equipment market. Like the rest of IP, this is also written in JedaX using high level constructs.
Companies interested in any of the announced products should contact Jeda Technologies to find out more about these verification environments. Others, interested in verification IP not listed should contact the company.
Jeda technologies announced the latest JedaX version 3.1 in Nov, 2003 with latest enhancements. The tool's first release was in Oct, 2001.
About JedaX
JedaX, is the 2nd generation purpose built tool for developing testbenches to validate of digital ASIC and FPGA designs. It allows rapid development of intelligent self-checking test benches, due to its high-level abstracts and powerful checking constructs, and ease of learning. Its object-oriented and-aspect oriented technology facilitates testbench development in a modular manner allowing re-use of verification code, an elusive promise so far.
About Jeda Technologies
Jeda Technologies, Inc. is a privately held EDA company providing a IC functional verification and modeling platform to verify complex FPGA, ASIC and SoC designs.
Jeda delivers a comprehensive solution for writing verification testbenches at block, chip and system levels. Jeda's offering automates the process of identifying functional design problems, reducing overall product development costs, increasing productivity, and accelerating time-to-market for designers of digital systems. Jeda's products are used in the communications, computing and consumer electronics markets. Jeda Technologies is also instrumental in the IEEE Verilog standards committee with its donation of testbench layer technology.
Jeda Technologies was founded in December 2002 by a team of Hardware Verification Language (HVL) veterans involved in the creation of one of the first commercially available HVL, and is based in Mountain View, California. For more information, please visit www.jedatechnologies.com.
About Spreadtrum Communications
Spreadtrum Communications, Inc. is a leading provider of wireless Integrated Circuits (IC), software solutions to wireless equipment manufacturers, mobile terminal vendors and semiconductor companies. www.spreadtrum.com
About Exavio
Exavio enables cost-effective streaming of high-quality video anywhere, anytime over ubiquitous IP networks. Exavio also vastly improves workflow and productivity for digital video and film production. www.exavio.com
The Verification IP's generally referred to as Jeda-Plug-n-Play-Module (JPPM), are built around standard protocols and interfaces commonly used in the design of ASICs and FPGAs. These include the PCI-X, SPI-4 Phase 2, Ethernet, and ARM processor (AMBA) test bench environment.
"The whole idea behind SOC trend is to be able to use design IP developed by others. We at Spreadtrum have been using JedaX for our verification needs in the development of Wireless ASICS and had been very pleased with the experience. The availability of ready-made ARM AMBA verification environment can save us tremendous amount of effort that we otherwise have to expend," said Mr. Jin Ji, VP of SoC Design of Spreadtrum Communications.
PCI-X verification IP available from other sources is commonly written using Verilog/VHDL HDL. Verilog is a great language for designing chips but falls short when it comes to developing testbenches. It may be adequate for testing a PCI core stand alone, but when time comes to integrate that core with the rest of the system, it becomes very tedious to extend the verification code written by a third person in Verilog. The beauty of Object-Oriented JedaX based testbench is that they are compact, modular, reusable and easily extensible. "The PCI-X testbench couldn't have come at a better time for us. In our system we use standard interfaces. We would rather use our engineering resources for developing verification code for our value-add portion of design instead of standard interfaces. The PCI-X JPPM is exactly what we needed," expressed Mr. John Ding, Vice President and chief architect, at Exavio, a company developing video storage servers.
Jeda Technologies has also made available the verification IP for the standard SPI-4 phase 2 and Ethernet MAC for companies that are in the data networking or telecommunication equipment market. Like the rest of IP, this is also written in JedaX using high level constructs.
Companies interested in any of the announced products should contact Jeda Technologies to find out more about these verification environments. Others, interested in verification IP not listed should contact the company.
Jeda technologies announced the latest JedaX version 3.1 in Nov, 2003 with latest enhancements. The tool's first release was in Oct, 2001.
About JedaX
JedaX, is the 2nd generation purpose built tool for developing testbenches to validate of digital ASIC and FPGA designs. It allows rapid development of intelligent self-checking test benches, due to its high-level abstracts and powerful checking constructs, and ease of learning. Its object-oriented and-aspect oriented technology facilitates testbench development in a modular manner allowing re-use of verification code, an elusive promise so far.
About Jeda Technologies
Jeda Technologies, Inc. is a privately held EDA company providing a IC functional verification and modeling platform to verify complex FPGA, ASIC and SoC designs.
Jeda delivers a comprehensive solution for writing verification testbenches at block, chip and system levels. Jeda's offering automates the process of identifying functional design problems, reducing overall product development costs, increasing productivity, and accelerating time-to-market for designers of digital systems. Jeda's products are used in the communications, computing and consumer electronics markets. Jeda Technologies is also instrumental in the IEEE Verilog standards committee with its donation of testbench layer technology.
Jeda Technologies was founded in December 2002 by a team of Hardware Verification Language (HVL) veterans involved in the creation of one of the first commercially available HVL, and is based in Mountain View, California. For more information, please visit www.jedatechnologies.com.
About Spreadtrum Communications
Spreadtrum Communications, Inc. is a leading provider of wireless Integrated Circuits (IC), software solutions to wireless equipment manufacturers, mobile terminal vendors and semiconductor companies. www.spreadtrum.com
About Exavio
Exavio enables cost-effective streaming of high-quality video anywhere, anytime over ubiquitous IP networks. Exavio also vastly improves workflow and productivity for digital video and film production. www.exavio.com
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