sci-worx Standardizes on TransEDA's Verification Navigator for IP Qualification
LOS GATOS, Calif. & HANOVER, Germany--(BUSINESS WIRE)--April 9, 2001--TransEDA PLC today announced that sci-worx, a leading independent IP and design service provider, has standardized on TransEDA's Verification Navigator as an integral part of its IP Qualification process to help optimize the quality of its DesignObjects® Intellectual Property (IP) cores.
``To meet our customers ever increasing demands for quality, we are using TransEDA's Verification Navigator to provide critical coverage analysis solutions to verify and ensure high quality design cores,'' said Dr. Juergen Haase, manager digital design at sci-worx. ``We strongly believe that error-free, optimized IP is vital for success in the emerging SoC design market. With Verification Navigator we can confidently provide our customers with generated coverage reports as a standard deliverable of the IP Qualification process, to prove our sophisticated verification methods, and the quality of our DesignObjects® library.''
The IP market is one of the most rapidly expanding segments in the semiconductor industry. As a result, the demand for high quality IP from suppliers such as sci-worx is growing. To address this new requirement, sci-worx has standardized its design flow and formalized an IP qualification process to guarantee unified quality for all its modules. The two-stage process consists of formal and physical qualification, in which TransEDA's VN-Cover, part of the Verification Navigator environment, plays a key role.
``Evidence of thorough functional verification is becoming a requirement for IP suppliers,'' said Tom Borgstrom, vice president of marketing at TransEDA. ``Verification Navigator offers a standard measure of verification excellence trusted by both IP suppliers and IP consumers. We are happy that sci-worx has selected Verification Navigator for verification of their DesignObjects® library.''
sci-worx has standardized on VN-Cover within its design flow for handling coverage analysis in the IP qualification process. VN-Cover enables the designer to switch between a variety of coverage analysis options of which sci-worx has adopted 100 percent statement, 100 percent branch and 90 percent condition coverage as standard measures for DesignObjects®.
``Coverage analysis is part of making IP as secure as possible. There is no such thing as 100 percent verified, but you can verify to a point where you can exclude most errors,'' explained Peter Neumann, SoC integration senior engineer at sci-worx. ``There are simulators that include statement coverage, but these provide only the basics. We haven't come across any other tools that provide such comprehensive coverage analysis as VN-Cover.''
Getting information on code quality as early as possible during the IP development process is critical since turnaround times can increase significantly if errors are detected late in the design process. This can lead to significant extra costs or at worst, missed time-to-market windows. For these reasons, sci-worx executes code coverage analysis during the design process as well as during IP qualification.
About sci-worx -- Europe's leading Intellectual Property and Design Service Provider for Networking, Telecommunications and Multimedia
sci-worx is a leading microelectronics technology licensing and design company with more than 300 employees including 250 engineers. With a library of over 70 soft cores sci-worx is one of the world's leading IP providers. DesignObjects®, sci-worx's synthesizable ASIC cores, reduce time-to-market and risk for new IC products and applications by offering off-the-shelf solutions. sci-worx's core verification program ensures high quality and performance of all DesignObjects®.
sci-worx is an approved ARM Design Center. This partnership enables sci-worx to access leading ARM technology for system-on-chip microprocessing applications.
sci-worx complements its DesignObjects® with a comprehensive suite of design services including system integration, and software development, as well as system and IP validation. All this is based on mature application know-how and numerous years of design experience. Headquartered in Hanover the company also has locations in Brunswick and Hamburg, Germany, and Palo Alto, Calif. For more information, contact sci-worx GmbH at Garbsener Landstrasse 10, 30419 Hanover (Germany), telephone ++49 (0) 511 / 277-0, fax ++49 (0) 511 277-2150, email email@example.com, or visit http://www.sci-worx.com.
TransEDA PLC (symbol TRA on the London Stock Exchange) develops and markets software and IP for verifying electronic integrated circuit (IC) and system on a chip (SoC) designs. The company's verification IP library includes models for advanced microprocessors and bus interfaces. The company's design verification solutions perform system level testbench automation, configurable HDL checking, coverage analysis, test suite analysis, and state machine analysis. TransEDA's customers include 18 of the top 20 semiconductor vendors, which represent 74 percent of the worldwide semiconductor industry. For more information, contact TransEDA at 985 University Avenue, Los Gatos, Calif. 95032, telephone 408/335-1300, fax 408/335-1319, email firstname.lastname@example.org, or visit http://www.transeda.com.
DesignObjects® is a registered trademark of sci-worx's. All other trademarks are the property of their respective owners and should be treated as such.
Contact: TransEDA, Los Gatos
Tom Borgstrom, 408/335-1303
Peter Neumann, +49 511 277 1835;
Michelle Clancy, 252/940-0981
Sharon Graves, +44 1242 525205