Unique Mix and Match modules maximise silicon efficiency June 21, 2004
- RF Engines Ltd, the FPGA signal processing expert, has released details of its latest Matrix™ range of high specification ‘building blocks’ for digital transceiver designs that offer a unique ‘mix and match’ way to create precisely tailored FFT solutions that maximise silicon efficiency.
The building blocks are supplied as intellectual property (IP) components for system-on-programmable-chip designers. They allow specialised and demanding multi-channel receivers to be designed in a much shorter time scale and with a much-reduced technical risk.
This range of mixed-radix channel banks, along with rate converter and numerically controlled oscillator cores, allows highly optimised channelised receivers to be developed on small and cost-effective FPGA devices. They are ideal for applications such as wireless communications nodes, medical instrumentation, radar, sonar, electronic surveillance, test instrumentation, real-time spectral analysis and satellite communications receivers.
The Matrix range of cores is built around a set of different prime length DFT (Discrete Fourier Transform) cores. When these different cores are combined, they allow non ‘power-of-two’ FFTs to be configured that exactly match the number of points required for the application. When coupled with the rate converter core, they allow a channel bank to be configured that exactly matches the required output spacing and sample rate.
As an example, in a recent design that required 1872 channels to be precisely extracted from a spectrum bandwidth in excess of 40MHz, 2-point, 3-point and 13-point DFT cores were integrated to produce this exact length FFT. A simple 2048 point FFT would not have been able to meet the channel spacing and sample rate requirements for this application. The design fitted comfortably within a Xilinx Virtex Pro50 FPGA with room to spare. The design also included a complex rate converter, Doppler correction and channel mapping capability.
John Summers, VP of Sales and Business Development at RFEL, said: “The release of these cores further demonstrates RFEL’s commitment to providing our customers with the most optimised building blocks available for high performance digital signal processing. Also, our experience in complete receiver design enables us to understand the real needs of the system designer, and so we can simplify and de-risk the product development program.”
Tese fully pipelined cores are available for licence in netlist form as a component ready to be combined with a customer's own IP. Alternatively RFEL can provide the core in bit-stream format for a complete chip design. The Matrix cores can be used on both Xilinx and Altera FPGA families and can achieve continuous real time processing of complex data at up to 200 MS/s with faster speeds being possible by combining multiple cores. RF Engines Limited
RF Engines Limited (RFEL) is a UK based signal processing specialist, providing high specification signal processing cores, system on chip designs, and FPGA based board solutions for applications in the defence, communications and instrumentation markets. These applications include base stations, wireless and wireline broadband communications systems, satellite communications systems, test and measurement instrumentation, as well as defence, signal intelligence and surveillance systems.
More specifically, RFEL is a solutions provider for projects requiring complex front end, real time, wide and narrow band, flexible channelisation. The company provides a range of standard cores covering multiple FFT, polyphase DFT and proprietary PFT techniques, as well as system design services for more specialist applications.
For further information, please see the website at www.rfel.com
or contact RF Engines at Innovation Centre, St Cross Business Park, Newport, Isle of Wight, PO30 5WB, Great Britain. Tel +44 (0) 1983 550330. RFEL, Matrix and PFT are trademarks of RF Engines Limited