- First standard to be released by the newly formed IP Protection Pillar
- Leading Companies Use and Support Hard IP Tagging Standard
Wakefield, MA. – July 19, 2004 –The VSI Alliance (VSIA) today announced the release of the “Virtual Component Identification Physical Tagging Standard” (IPP 1 2.0) to the VSIA general membership. This standard is the first to be released by the newly created Intellectual Property (IP) Protection Pillar. The original standard, IPP 1.0 was created within the old VSIA Development Working Group (DWG) and was transferred to the IP Pillar in May, 2004. At the request of the users and supporters of the Hard IP Tagging Standard including TSMC, UMC, STMicroelectronics and Artisan, the standard was updated to more closely track with new industry requirements.
Upgrades to the standard provide increased flexibility and freedom. New additions to the standard allow the developer to:
- Post GDSII tags on any layer
- Place tags in any XY location placement and with any MAGnification
- Create tag fields. User keywords must start with the “_” character
- Tag and identify and administer records and royalty activity around IP blocks used in SOC design.
The new version of the IPP 1 2.0 is fully backward compatible with the previous version of the standard.
The Physical Tagging standard is fully complementary to and compatible with the forthcoming soft IP tagging standard from this same group. While the Hard IP standard deals with IP delivered to a customer solely in GDSII, the soft IP tagging standard will discuss IP delivered to a customer in RTL and secure tagging, tracking and revision control through the entire design flow, down into GDS II.
“IP protection is one of the toughest issues faced by the SoC industry today,” said Ian Mackinstosh, IP Protection Pillar Chairman, VSIA Board Member and President of OCP-IP. “The IP Pillar is comprised of worldwide industry SoC companies and a network of industry experts who have dedicated hundreds of hours to address issues of one of the toughest problems in the SoC industry today: IP protection.”
"STMicroelectronics was an early adopter of VCID 1.0 which provided solutions for IP tracking that balances the necessary level of detail with customer usability of Virtual Components to foster the proliferation of design reuse," said Peter Hirt, IP Program Manager, STMicroelectronics. "The updates with VCID 2.0 will better serve current users and the industry overall."
Ken Liou, director of the Design Support division at UMC, said, "As reusable IP has become a significant component in today's complex SoC designs, it becomes increasingly important that a common IP tagging standard be used to identify hard IP cores. UMC is a leader in the development of VCID 1.0, a standard that has enabled this process, and we are delighted to endorse the enhancements now available in VCID 2.0”
About the VSIA IP Protection Pillar
The IP Protection Pillar (IPP) defines, documents, and demonstrates open, interoperable, standards-based solutions and promotes awareness of IP protection schemes and practices that balance the necessary level of security with customer usability of IP to foster the proliferation of design reuse. Participant companies in the IPP Pillar include: IBM, Synopsys, Mentor, Cadence, Freescale, Intel, ST Micro, Agere, Sonics and others.
About the VSIA Hard IP Standard
The Hard IP standard benefits providers and integrators of IP and semiconductor foundries. Providers of IP and/or CAD software may use this document to enhance their products by enabling IP blocks (or VC’s) to be tracked by this industry standard methodology. Semiconductor foundries use this industry standard methodology to scan all GDSII-Stream databases, which they fabricate. The Standard allows users and adopters to report the vendor of the physical components, product name and version. Foundries use the resulting GDS II records to improve their business mechanisms for tracing and reporting IP use when dealing with customers, partners and suppliers.
The VSI Alliance (VSIA) is an open, international organization that includes representatives from all segments of the SoC industry: System houses, Semiconductor vendors, Electronic Design Automation (EDA) companies, and Intellectual Property (IP) providers. VSIA’s mission is to dramatically enhance the productivity of the SoC design community by providing leading edge commercial and technical solutions and insight into the development, integration and reuse of IP. VSIA has wide industry participation with more than 70 member companies from around the world. Membership is open to any company with an interest in the development and promotion of business solutions and open standards used in the design of System-on-Chip. For more information, visit the VSIA web site at www.vsi.org.
The VSI Alliance is a trademark of the Virtual Socket Interface Alliance. All other brands or trademarks are the property of their respective holders and should be treated as such.