RISC-V-based AI IP development for enhanced training and inference
Genesys Logic Introduces PCI Express and GigaSata Serial ATA Products at Intel Develop Forum
Genesys Logic will highlight its latest product families at the Moscone Convention Center during IDF in booth number 1047, South Hall.
GL9714 and GL9711 are the first PCI Express 4-lane and 1-lane PIPE PHY in the industry implemented in a 0.18ìm standard digital CMOS process. GL9714 and GL9711 fully comply with both the PCI Express Base Specification Revision 1.0a and the PHY Interface for the PCI Express (PIPE) Architecture version 1.0 from Intel. GL9714 is a four-lane transceiver, which can be combined and expanded to 8/16/32 lanes in the system designs. It meets the demand of various bandwidth requirements for networking, graphics, storage, and many other high-speed applications.
The GL9701 (GigaCourier/SFO) is a 1-lane PCI Express to PCI bridge. In addition to PCI Express spec, it fully complies with PCI Local Bus Specification 2.3 and PCI Express to PCI Bridge Specification Revision 1.0a. On the PCI side, it supports up to 4 devices. The PCI bus is 32-bit wide and capable of running at either 33 or 66MHz, with PCI LOCK# support. It will be available at the end of 2004 in QFP packages.
The Genesys Logic GigaSata product family extends the success of its highly acclaimed PCI Express SerDes technology into the rapidly growing SATA storage market. GigaSata products are based on GLI’s proprietary low-power SATA 3.0Gbps PHY, which is also the first in the industry implemented in standard 0.18um CMOS. The GigaSata USB2.0 controller is a USB-to-SATA HDD controller and is designed to support popular USB external hard drive applications. The GigaSata IDE bridge is an IDE-to-SATA bridge and focuses on the ATAPI devices.
GL9714, GL9711 and GigaSata PHY have Built-in Self Test (BIST) in place with various fixed and random patterns. In conjunction with different flavors of loop-back modes, they enable functional self-checking of the analog transceiver at speed in production.
Genesys Logic will also have the PCI Express PHY on the standard 0.13ìm digital CMOS process in Q4/2004. Porting PCI Express PHY and GigaSata PHY to other foundries is available upon request.
For more information about Genesys Logic’s PCI Express product Families and GL230 white paper, please visit our website http://www.genesyslogic.com
|
Related News
- Genesys Logic Introduces PCI Express and GigaSata Serial ATA Products at IDF Spring 2005
- Genesys Logic Introduces PCI Express Product Family
- Synopsys Showcases DesignWare IP Solutions for USB 3.1 and PCI Express 4.0 at Intel Developer Forum 2014
- Virage Logic Introduces Volume Production-Proven SiPro PCI Express PHY IP
- Pericom Reaches New Signal Integrity Benchmarks for PCI Express and Serial ATA Protocols
Breaking News
- September foundry sales: a tale of differing fortunes
- Exclusive Interview: Antti Rauhala Discusses CoreHW's CHW3021 Radio Front-End IC
- SEMIFIVE Extends Partnership with Arm to Advance AI and HPC SoC Platforms
- DisplayPort Rx PHY and Controller IP Cores in multiple Leading Technology Nodes for Next-Generation Video SoCs
- SEMIFIVE Concluded Mass Production Contract for AI Chip with HyperAccel
Most Popular
- Intel, TSMC to detail 2nm processes at IEDM
- Crypto Quantique teams up with Attopsemi to simplify the implementation of PUF technology in MCUs and SoCs
- Efabless Unveils New Custom Chip Platform Designed for Edge ML Products
- Faraday and Kiwimoore Succeed in 2.5D Packaging Project for Mass Production
- SensiML Expands Platform Support to Include the RISC-V Architecture
E-mail This Article | Printer-Friendly Page |