San Jose, Calif., September 7, 2004„ŸAltera Corporation (NASDAQ: ALTR) today announced that its Stratix® II family of FPGAs is interoperable with DDR2 SDRAM devices from industry leaders Infineon Technologies, Micron Technologies and Samsung Electronics Co. Ltd. At rates of up to 533-Mbps, Altera?fs memory interface solution delivers twice the performance of the nearest competing 90-nm FPGA. While using devices rated up to 533-Mbps, Altera has also demonstrated over 640-Mbps data throughput with Infineon, Micron and Samsung DDR2 devices. This provides designers ample timing margin to easily get their 533-Mbps designs into production. The hardware-verified interoperability illustrates Altera?fs leadership and commitment to providing complete solutions that help designers implement memory interfaces easily when using the most advanced memory technologies.
A key component of Altera?fs memory solutions include parameterizable intellectual property (IP) controller cores and associated design software for DDR2, DDR, and QDRII memories that automatically perform timing margin analysis and constraint selections to simplify the design process and reduce design cycle time.
?gAltera offers the industry?fs fastest FPGA-based DDR2 interface solution. This solution helps system designers resolve the various design challenges involved in implementing memory interfaces for high-performance systems, simplifying the design process,?h said Ulrich Englert, marketing director for Infineon?fs commodity DRAM products. ?gThis, in turn, allows the designers to focus on those system functions that differentiate their products from the competition.?h
?gAs the first supplier to ship 256Mb, 512Mb and 1Gb DDR2 devices, Micron is excited about the interoperability of Altera?fs Stratix II family with DDR2 memory devices,?h said Deb Matus, Micron?fs product marketing manager for Networking and Communications. ?gOnce again, Altera is demonstrating their ability to deliver the robust memory interfaces required by today?fs high-end systems.?h
?gThe Stratix II FPGA family provides a great platform for customers to transition to high-speed DDR2 SDRAM memories,?h said Jim Elliott, associate director, DRAM marketing for Samsung Semiconductor. ?gAs the leading memory supplier, Samsung supports all Stratix II FPGAs memory technologies, including DDR2, DDR, and QDRII SRAM. Together, Samsung and Altera are helping to minimize our customers?f risk as they bring their system designs up quickly.?h
Leveraging the Industry-Leading Stratix FPGA Series
To simplify the implementation of Stratix II FPGAs in these applications, Altera has developed comprehensive solutions that help designers quickly overcome board, interface, and controller design challenges associated with high-performance memory implementations, thereby speeding time to market. Altera?fs memory interface solutions leverage the high performance capabilities and powerful features available in the Stratix FPGA series. These include built-in circuitry to easily implement a 90 degree DQS phase shift during READ operations, six registers in the I/O cell to enable DDR signaling, SSTL and HSTL I/O pins to support memory-device compatible standards and powerful phase-locked loops (PLLs) for system clock management.
Altera?fs memory interface solutions are also supported by a range of Stratix series reference platforms and development kits, including:
- A Stratix II high-speed I/O development kit targeted at DDR2 applications;
- A Stratix II PCI reference platform for DDR applications; and
- Two Stratix II memory reference platforms: one targeted for DDR applications, and the other targeted to DDR2 and QDR II applications.
DDR2 memories are important in performance-hungry applications such as networking, wireless, computing, and storage. ?gMany of our FPGA customers are working on designs that require interfaces to advanced memory devices,?h said Steve Mensor, Altera?fs senior marketing director for new products. ?gAltera?fs comprehensive memory interface solutions get our customers to market faster with higher-performing systems and lower system integration risks.?h
Altera is hosting a free net seminar titled Design High-Speed DDR2 Interfaces with FPGAs on Sept. 22nd at 11 a.m. PST. The net seminar will cover high-speed DDR2 I/O interface, controller, and board-design design challenges and how Altera?fs complete DDR2 interface solutions will resolve these challenges to lower risks, maximize performance, and accelerate time-to-market. Register at http://www.altera.com/netseminar_memory.
Pricing and Availability
The Stratix II high-speed I/O development kit is available for ordering through Altera?fs distribution channel and sales representatives. Pricing for the development kit is $1,995. Customers interested in a reference platform demonstration or in using Altera?fs IP cores should contact their local Altera sales representative. For more information about Altera?fs memory interface portfolio, visit the Altera website at www.altera.com/memory.
Altera Corporation (NASDAQ: ALTR) is the world?fs pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.
Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holder.