Chip-level signal integrity issues can be detected and corrected earlier in the design process
SAN JOSE, Calif., AND CAMBRIDGE, UK —Oct. 27, 2004 — Cadence Design Systems, Inc. [(NYSE: CDN); (Nasdaq: CDN)], and ARM [(LSE:ARM); (Nasdaq:ARMHY)], today announced the availability of signal integrity (SI) views from ARM for Foundry Program Partners. For designers incorporating hardened ARM® processors into their designs, these views give access to critical data required to perform detailed voltage drop and SI analysis. This analysis speeds time-to-market of nanometer-scale system-on-chip (SoC) designs by rapid detection and resolution of critical SI issues. The ARM processor views support industry-leading Cadence tools, including CeltIC™ crosstalk analysis and repair and VoltageStorm® power grid analysis, which are core technologies within the Cadence® Encounter™ digital IC design platform.
As customers move to 130 nanometers and below, voltage drop and SI issues pose increased risks of chip failure and poor yield. When combined with the growing use of hardened intellectual property (IP), the risk of critical design problems due to SI issues is even greater because designers previously had no SI views for the hardened IP. This joint solution provides the critical characteristics of hardened IP processors provided by ARM that will enable designers to find and correct SI problems earlier in the design process, speeding time-to-market for ARM Partners.
“The collaboration between Cadence and ARM to deliver these views will enable us to identify and correct potential chip failure and yield loss problems before tapeout, and shorten our time-to-market,” said Dr. Chi-Sin Wang, chairman and chief executive officer at Centrality Communications. “The availability of these models will enable us to fully utilize the capabilities of Cadence’s SI analysis solutions in our SoC designs.”
“ARM and Cadence have provided yet another important capability to enable faster, and more accurate verification of designs incorporating hardened ARM IP,” said Keith Clarke, vice president, Engineering, ARM. “The co-development of these SI views further reduces the risk for our Foundry Program Partners, and will continue to help reduce overall time to working silicon for our Partners.”
“Identifying and correcting signal integrity issues early in the design cycle is critical to first silicon success,” said Jan Willis, senior vice president, Industry Marketing, Cadence. “By optimizing the silicon design chain for our customers, Cadence and ARM are enhancing the successful implementation of nanometer designs.”
The signal integrity views are available from ARM for its Foundry Program Partners.
Cadence is the world’s largest supplier of electronic design technologies and engineering services. Cadence products and services are used to accelerate and manage the design of semiconductors, computer systems, networking equipment, telecommunications equipment, consumer electronics, and other electronics based products. With approximately 4,850 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and trades on both the New York Stock Exchange and Nasdaq under the symbol CDN. More information is available at www.cadence.com.
Cadence, the Cadence logo and VoltageStorm are registered trademarks and Encounter and CeltIC are trademarks of Cadence Design Systems, Inc. in the U.S. and other countries. All other trademarks are the property of their respective owners.
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