IC Nexus to begin HSIO (High Speed I/O) ASIC design with Fujitsu
Taipei, Taiwan, November 24, 2004 --- IC Nexus Ltd. today announced the start of a HSIO ASIC project with a well-known global semiconductor design house. The project contains several HSIO macros including PCI-Express, SATA and other glue logic. It is to be fabricated with Fujitsu's 0.13um process. With well establish support from Fujitsu, IC Nexus will continuously devote its efforts on the service for Giga data rate HSIO ASIC designs inlcuding PCI-Express, SATA2, SGMII, etc...
About IC Nexus
IC Nexus is a key provider for Fujitsu's broad range of ASIC technologies, processes, and IP solutions in Taiwan's hugely competitive silicon industry. The Company credits its success to a strong technological base, a competent and qualified workforce, and a highly trained, strategically distributed support network.
With flexible access to state-of-the-art ASIC manufacturing facilities and with strong ties and tight integration to major assembly and testing partners, IC Nexus is able to provide solutions for the most advanced, cost-effective, and appropriate processes to successfully meet the most demanding of schedules and budgets.
For more information about IC Nexus, visit http://www.icnexus.com
|
Related News
- Kalray To Launch High Speed I/O Processors
- LogicVision and DA-Test Collaborate to Provide Low Cost High Speed SerDes I/O Test
- LogicVision and GDA Technologies Partner to Deliver LogicVision's Unique High Speed I/O Test IP
- Toshiba Adds Multi-Protocol High-Speed SERDES I/O Core Family That Meets High Speed Requirements of Storage, Networking, Consumer and Gaming Markets
- Lattice FPGAs with High I/O Density Bring Low Power Signal Bridging and Interface Management to Edge Devices
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |