Palo Alto, CA — December 15, 2004 — Structured application specific integrated circuits (ASIC) is currently the most viable design technology in the semiconductor chip market – a paradigm shift from the gate arrays and cell-based ASIC that dominated the market previously.
"Structured ASIC is an exciting evolution that was brought about by the soaring costs of cell-based ASIC and the inability of field programmable gate arrays (FPGA) to match the performance, size, and power dissipation characteristics required by numerous applications,” says Frost & Sullivan Research Analyst Swaminathan Srinivasan.
New analysis from Frost & Sullivan (www.semiconductors.frost.com), Structured ASIC: A New Breed Design Solution for the Future, reveals that this market generated revenue of $38.0 million in 2003. Total market revenue expects to register a phenomenal growth of $876.0 million in 2008.
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Structured ASIC offers several other benefits such as considerable simplifications in the design chain, significantly lower non-recurring engineering charges, and a faster turnaround time. This is because only a part of the design is customized in a structured ASIC, unlike in a standard cell ASIC.>
Structured ASIC vendors are also able to achieve better economies of scale by manufacturing the prefabricated wafer – the master slice – in large volumes, thereby distributing most of the device’s development costs among many customers.
However, choosing the right structures and intellectual property to be included in the master slice is one of the most critical challenges facing vendors. Since customers are unwilling to pay for irrelevant structures, incorporating unnecessary IPs would not only necessitate extra die size, but also increase overall costs.
“Currently, vendors are determining the components that should go into the master slice based on past experience of customer needs, and, in some cases, working with a key client to create a custom master slice,” notes Srinivasan. “The way customers react to the offerings of different vendors will ultimately decide the winner in the market.”
With the cost of next-generation technology increasing exponentially, companies are likely to incur huge research and development costs. In such a situation, staying financially viable is bound to be a difficult task.
At a time when economics threatens to restrain technological development, emerging structured ASIC is perhaps the only design technology that promises to provide hardware differentiation, superior performance, and other essential attributes at an affordable cost.
However, increased uptake of this technology is largely dependent on a fundamental shift in the client’s mind-set. Customers must realize the potential of structured ASIC as a viable alternative to the more familiar cell-based ASIC or FPGA technology.
“Structured ASIC combines some of the best features of both FPGA and ASIC, making it the first choice for a lot of designs,” says Srinivasan. “It addresses the market window between cell-based ASIC and FPGA effectively, providing performance close to that of ASIC with the flexibility and time-to-market closer to that of FPGA.”
Structured ASIC: A New Breed Design Solution for the Future, part of the Semiconductor subscription, highlights the potential of emerging structured ASIC to be the next big design technology in the semiconductor chip market. In-depth market revenue and growth forecasts are provided for the ASIC, FPGA, and the emerging structured ASIC markets. Executive summaries and interviews are available to the press.
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