Chameleon eyes ASIC segments with reconfigurable chip

Chameleon eyes ASIC segments with reconfigurable chip
By Will Wade, EE Times
February 15, 2001 (5:35 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010214S0041

PALO ALTO, Calif. — Chameleon Systems Inc. is sampling its first product, a highly flexible processor that can be reconfigured remotely in the field. The company's initial target market is cellular basestations, but executives are also casting an eye on the ASIC and gate array segments, where customers require custom configurations.

"This is the next evolution beyond an FPGA," said Chuck Fox, president and chief executive of Chameleon (San Jose, Calif.). "We've proved it can be done. This is the beginning of a trend."

The CS2112 features 108 arithmetic processing units. Each of those 32-bit processing cores runs at 125 MHz. Their combined power, Fox said, is comparable to that of a Pentium-class processor running at frequencies higher than 12 GHz.

The company received $47 million last month in what should be its final round of financing. It is already providing samples of its first chip to beta customers, and it expects to generate mor e than $1 million in revenue this year. Fox said four of the top eight telco vendors are considering using the Chameleon chip in basestations.

The key to the design is the small size of each processing element. Fox said the smallest segments of the chip can be defined with just 50 bits of software code, so the entire chip can be reprogrammed with just 50,000 bits of software description. It takes just 20 microseconds to reconfigure the entire processing array, he said.

There are several different uses for this kind of flexibility. The initial focus is basestations and their unpredictable combination of voice and data traffic. With a fixed processor, Fox said, the channels must be able to support both simple voice calls and high-bandwidth data connections, which means many voice calls do not use up all the bandwidth that is assigned to them. With a reconfigurable processor, each channel can be allotted the exact amount of bandwidth it requires.

"I would conservatively estimate that this can mean a fivefold increase in the number of channels the chips can support," said Cary Snyder, senior analyst for The Microprocessor Report (Sunnyvale, Calif.). Since telecom vendors rent space for their systems by the square foot, an approach that can support more channels in a single rack could quickly lead to lower operating costs, Snyder said.

The CS2112 is produced in a 0.25-micron process by Chameleon foundry partner Taiwan Semiconductor Manufacturing Co. Ltd. It will be priced at $150 in volume. Next year the startup plans to bring out a 0.18-micron version of the chip, and down the line it could produce a version aimed at the cellular handset market.

While the first device is optimized for the basestation market, Snyder said the basic design could easily be adapted to compete against ASICs or FPGAs. While ASICs may offer better performance for specific applications, a reconfigurable chip would have both cost and time advantages because it could be available in far less time than the several months typically required for an ASIC.

"The potential is definitely there for Chameleon to gain some ground in those markets," he said.

The potential threat from start-up Chameleon does not have ASIC giant LSI Logic Corp. worried, however. LSI chairman and chief executive officer Wilf Corrigan said some customers may turn to a reconfigurable platform, but he claimed most of his key accounts come to LSI because they need high performance.

And if some of the reconfigurable designs become big winners and generate strong demand from customers, Corrigan's got another solution: "We will probably end up licensing some of their technology and then we can also offer it to customers."