Enabling major reduction in high-speed D/A converter circuit design time
Tokyo, January 21, 2005 −− Renesas Technology Corp. today announced the development of an automated device sizing system that shortens the development time of high-speed digital/analog converters (D/A converters) incorporated in SoCs (systems-on-a-chip) for digital home electronics, PC, and communication applications.
Using this system, automated circuit generation was performed for an 11-bit-resolution D/A converter using a 0.18 ƒÊm CMOS process, a prototype was fabricated, and performance results were verified. The effectiveness of this system was confirmed by a significant shortening of the circuit design time, with an execution of time of approximately four days required for automated schematic generation with a WS (workstation) incorporating four CPUs as compared with the usual Renesas Technology development time of 8 to 12 weeks.
Layout of D/A Converter
In the electronic product field, including digital home electronics such as TVs and DVDs and PCs, high-speed D/A converters are essential for display and converting digital modulated signals to analog signals. Similar high-speed D/A converters are also necessary in the high-speed communication field, for use with products supporting standards such as 802.11a/b/g*1. The trend is for these high-speed D/A converters to be incorporated in SOCs, which are key devices in such user products, and this trend is expected to become more widespread in the future. SoCs are employing ever finer processes in order to achieve larger-scale integration and higher performance, and it is important for a built-in D/A converter to be capable of high-speed operation at a low power supply voltage. At the same time, a greater number of SoC models with a built-in D/A converter are being developed every year. However, for D/A converters of various specifications used in such fields, engineers with analog circuit expertise who are skilled in D/A converter circuit design currently carry out individual manual design work according to particular specifications, making it difficult to shorten development times and hindering timely development of new models for wider applications.
Details of Technology
Against this backdrop, Renesas Technology researched and developed a high-speed D/A converter automated device sizing system that performs automated circuit design in a short time-frame for various kinds of D/A converters, including models capable of low-voltage operation. Renesas Technology has now completed automated generation of a D/A converter circuit using this system, carried out actual prototype evaluation, and verified the results. The newly developed technology is described below.
High-speed D/A converter automated device sizing system
The newly developed high-speed D/A converter automated device sizing system performs element size (device size) optimization when target specifications are input.
This system includes (a) a commercially available device size optimization engine, (b) a commercially available circuit simulator, (c) a process database for simulation device models, etc., (d) high-speed D/A converter schematics without device sizes, and (e) a script program, etc., that controls these elements.
In conventional high-speed D/A converter development, device sizes are determined by successively executing circuit simulations based on design know-how (device size optimization procedures, constants obtained experimentally, and so forth) derived by experts based on experience. In this automated device sizing system, experts' accumulated design know-how is embedded in script program, and functions are constructed for automatically performing execution and assessment of a series of circuit simulations. This systemization process makes it possible to achieve automated D/A converter circuit generation with a level of design quality on a par with that of expert engineers.
Features and technological details of this high-speed D/A converter automated device sizing system are summarized below.
|(1) ||Automated device size optimization |
|?@ ||In this system, target specifications are input, circuit simulation and assessment is executed automatically, and a schematic database in which device sizes are optimized is output. The system can thus perform device size optimization automatically on a 24/7 basis, enabling development time to be shortened significantly. |
|(2) ||High design quality through incorporation of experts' design know-how |
|?@ ||Embedding experts' design know-how in the system in script program enables even engineers unfamiliar with high-speed D/A converter circuit design to produce schematics equivalent in design quality to those created by expert engineers. |
|(3) ||Easy handling of D/A converter specification or process changes |
|?@ ||This system can handle not only circuit generation for D/A converters with different specifications implemented in the same process, but also changes in the high-speed D/A converter process, simply by changing the process database. |
|(4) ||Development of circuit technique offering low-distortion, low-voltage operation |
|?@ ||Renesas Technology has developed a proprietary circuit technique named ?gOne-Vgs Switching?h enabling low-voltage operation with low distortion, and has incorporated this technique in the new system. This enables automated generation to be applied to high-speed D/A converters for a wide variety of fields, including D/A converters offering low power supply voltage specifications necessary for communication applications. |
|(5) ||Ability to implement D/A converters with a wide range of specifications |
|?@ ||This automated device sizing system is capable of automated schematic generation for high-speed D/A converters covering a wide range of specifications, with resolutions of 8, 10, or 11 bits, a power supply voltage range of 1.35 V to 3.6 V, and a conversion frequency of up to 160 MS/s (megasamples/second*2). |
Using this automated device sizing system, an 11-bit-resolution, 160 MS/s D/A converter was designed using a 0.18 ƒÊm CMOS process, a prototype was fabricated, and the effects of the newly developed technology were verified. The verification process confirmed the following:
|(1) ||An automated device sizing system was constructed that is not affected by specifications or process. |
|(2) ||A high-speed D/A converter automated schematic database was automatically generated in an execution time of approximately four days (using a four-CPU workstation). |
|(3) ||A D/A converter designed and prototyped using this system was confirmed to have achieved 160 MS/s performance at 1.35 V operation. |
This newly developed technology is a promising design technique for shortening the circuit design period and improving the design quality of SoCs incorporating a high-speed D/A converter.
These results were announced at the 2005 Asia South Pacific − Design Automation Conference (ASP-DAC), covering automated design of LSI circuits, to be held in Shanghai from January 18, 2005.
Information contained in this news release is current as of the date of the press announcement, but may be subject to change without prior notice.
|Notes: ||1. ||802.11a/b/g: IEEE802 is the title of an IEEE (Institute of Electrical and Electronics Engineers) committee for promoting LAN standardization. IEEE802.11 is a wireless LAN related standard, with 802.11a and 802.11b relating to the use of 5 GHz band and 2.4 GHz band radio waves respectively. 802.11g is a standard for increasing the communication speed in the 802.11b 2.4 GHz band. |
|2. ||MS/s (megasamples/second): 1 MS/s denotes a sampling rate of one million samples per second. |