Ultra-low power 32 kHz RC oscillator designed in GlobalFoundries 22FDX
Impinj Announces Availability of AEFuse Memory – World's First Multi-Time Programmable Fuse in Standard Logic CMOS
The AEFuse product line extends Impinj’s IP portfolio, building on the success of the company’s higher density AEON™ nonvolatile memory while providing a new architecture ideal for myriad low bit-count storage applications, including trim data for on-chip analog components, encryption and identification information and chip configuration data.
As a reliable and cost-effective alternative to traditional fuse technologies, AEFuse memory provides up to 1000 re-write cycles, providing a more flexible solution for analog and mixed-signal semiconductor companies that require up to a few hundred bits of reprogrammable nonvolatile memory (NVM).
Impinj’s AEFuse has been adopted by two of the world’s leading mixed-signal chip producers including Analog Devices. "Transfer of intellectual property can be a challenge. We have been impressed with Impinj's ability to meet our high expectations for a smooth transfer of technology. Their exemplary technical support ensures our highest likelihood of success," said Paul Daigle, Product Line Manager, Analog Semiconductor Division at Analog Devices.
Market Need
AEFuse memory is optimized for small bit-count embedded applications, including on-chip analog trim, product calibration, customer-specific configuration, and encryption key storage. The diverse applications for AEFuse’s low cost, nonvolatile storage include LCD drivers (for storing analog calibration data), RF devices such as chips for wireless LAN, RF headsets and RF speakers (for storing system address and identification information) and dedicated-function microcontrollers (for storage of program code) all of which ship over one billion units per year. In an independent survey of 47 companies conducted by Informa Research, 73% of respondents require NVM in their next design, 71% use densities below 16 kilobits and an overwhelming 95% must have an MTP solution because one-time programmable (OTP) memories lack the necessary flexibility. “While traditionally interesting market opportunities for embedded memory IP providers, one-time-use laser-trimmed and polysilicon fuse solutions have inherent technical problems,” said Jordan Selburn, principal analyst with market research firm iSuppli Corp. “The ability to deliver a cost effective, multi-time programmable solution without those problems opens up new opportunities in a number of growing markets.”
Technical Data and Availability
Available immediately, AEFuse hard IP blocks are silicon-proven and fully characterized in TSMC’s 0.25 µm and 0.18 µm logic CMOS processes with qualification underway and expected to complete in the second quarter of 2005. Impinj delivers to licensees physical layout files, simulation models, timing information, and all technical documentation necessary for successful incorporation of AEFuse memory blocks into ongoing chip designs. Users can select from over 100 configurations, including those with on-chip high voltage blocks, oscillator and lock bits. All configurations operate over a temperature range from -40 °C to 125 °C, with 1000 re-write cycles, and 10-year retention.
Impinj, Inc. is a fabless semiconductor company whose patented Self-Adaptive Silicon® technology enables its two synergistic business lines: high performance RFID products and cost-effective semiconductor intellectual property (SIP). Impinj's semiconductor chips power high performance, enhanced-functionality RFID systems that fulfill the global mandates promulgated by the consumer packaged goods and retailing industries. The company is a leading contributor to the emerging RFID standards for high volume supply-chain applications worldwide. Impinj’s innovative SIP products, core to the company’s RFID tags, are licensed to leading semiconductor companies worldwide, allowing them to cost-effectively integrate crucial nonvolatile memory (NVM) alongside analog and digital functionality on a single chip.
|
Related News
- Virage Logic's AEON(R) Becomes the First Multi-Time Programmable Embedded Non-Volatile Memory Available on a Standard CMOS Process Qualified to Rigorous Automotive Standard AEC-Q100
- Kilopass Introduces Industry's First Embedded Multi-Time Programmable Non-Volatile Memory in 40nm Logic CMOS
- Virage Logic Embedded Multi-Time Programmable Non-Volatile Memory Gains Acceptance in Military Applications
- Impinj Expands Multi-Time Programmable Nonvolatile Memory Product Line
- SMIC Selects Virage Logic's AEON(R) Embedded Multi-Time Programmable (MTP) Non-Volatile Memory (NVM) For RFID Applications
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |