LSI Logic's implementation of the ARM1156T2-S processor provides performance improvements over ARM9 technology-based solutions without increasing areaSAN FRANCISCO, March 7, 2005 /PRNewswire-FirstCall via COMTEX/
-- Today at the Embedded Systems Conference (Booth # 415), LSI Logic Corporation (NYSE: LSI) announced that the industry's first 450 MHz timing-closed ARM1156T2-S(TM) processor core has been added to the LSI Logic CoreWare(R) IP library. LSI Logic's implementation of the ARM1156T2-S processor minimizes die area without sacrificing performance and provides designers with lower inherent design risks and costs for a wide range of embedded applications such as high- performance disk drives, The core is available for cell-based ASIC design in the company's G90 90-nanometer technology.
Complementing the ARM1156T2-S core is a complete reference design with all of the necessary peripherals for implementing an embedded design, including LSI Logic's unique ECC Memory Protection core that provides high-performance and cost-effective soft-error protection for tightly coupled memories on ARM processors.
"The ARM1156T2-S processor is perfectly suited for mass storage applications and can provide a significant performance improvement over ARM9 technology-based solutions without increasing the area," said Ed Marchand, senior marketing director Storage Custom Solutions, LSI Logic Corporation. "The reference design with the processor peripherals and fully integrated ECC solution provides customers with a springboard for their processor subsystem development."
LSI Logic's ARM1156T2-S hardmac is already timing closed at 450 MHz, thereby eliminating the effort and risk of closing processor timing at the ASIC level. The processor supports the ARMv6T2 architecture, including the new Thumb-2 instruction set which provides the performance of the ARM instructions with the code compression of the Thumb instructions. The processor core also conforms to the new AMBA(TM) 3.0 AXI bus specification for high-performance systems requiring high data throughput.ARM1156T2-S RTL-based Reference Design
LSI Logic's ARM1156T2-S offering includes a complete core reference design with Interrupt Controller, Synchronous Serial Interface, UART, GPIO, I2C, Timers, EBIU, APB bridge and the ECC Memory Protection Core. Delivered in RTL, the reference design provides a streamlined methodology for ARM users to quickly create and verify a custom processor subsystem for integration into a System-on-a-Chip (SoC).About CoreWare(R)
The LSI Logic CoreWare(R) IP library provides the industry's most comprehensive set of IP solutions that are proven and designed to work seamlessly with the cell-based ASIC and RapidChip(R) Platform ASIC design flows. CoreWare IP includes GigaBlaze(R) and HyperPHY(R) high-speed standards- compliant SerDes, high-performance ARM and MIPS processors, ZSP(R) DSPs, processor systems and reference designs, processor peripherals and AMBA on- chip-bus structures, USB cores, Memory PHYs and Controllers, Ethernet MAC and PHY cores, PCI Express, XGXS, SPI4.2 and other protocol layer IP. Customers can leverage CoreWare IP solutions to significantly reduce risk and turn- around times with complex SoC designs. Additionally, a dedicated worldwide IP support organization is available to assist customers in all aspects of CoreWare SoC design.About LSI Logic Corporation
LSI Logic Corporation focuses on the design and production of high- performance semiconductors for Consumer, Communications and Storage applications that access, interconnect and store data, voice and video. LSI Logic engineers incorporate reusable, industry-standard intellectual property building blocks that serve as the heart of leading-edge systems. LSI Logic serves its global OEM, channel and distribution customers with Platform ASICs, standard-cell ASICs, standard products, host bus adapters, RAID controllers and software. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035. www.lsilogic.com
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