Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
Xtensa LX Nearly 4X Faster than Next Closest Competitor
Santa Clara, Calif. – March 28, 2005 – Tensilica, Inc., the only company to automate the design of optimized application-specific configurable processors for system-on-chip (SOC) design, today announced that it has posted the highest score ever recorded for a licensable processor core, and the highest absolute score ever published for any processor, on the Office Automation benchmark suite of the Embedded Microprocessor Benchmark Consortium (EEMBC). The EEMBC benchmark scores, independently certified by the EEMBC Certification Laboratories (ECL), confirm that the Xtensa LX processor is nearly four times faster than the much larger PowerPC 440GX core, and more than 4 times as powerful as the 64-bit MIPS 20Kc processor.
The certified EEMBC OAmark scores are:
- 4.19523 – Optimized Xtensa LX processor
- 1.07999 – Out-of-the-box PowerPC 440GX processor
- 0.98880 – Out-of-the-box Xtensa LX processor
- 0.89033 – Out-of-the-box MIPS 20Kc processor
- 0.75975 – Out of the box ARM 1026EJ-S processor
EEMBC scores for licensable synthesizable processors are expressed on a “per-MHz” basis. The optimized configuration of Xtensa LX used in this Office Automation benchmark certification achieved a 454 MHz operating frequency in 90 nm ASIC technology. At that expected operating frequency, the 4.19523 OAmarks /MHz would yield an at-speed score of 1904 OAmarks. The optimized version of the Xtensa LX runs nearly four times faster than the much larger, out-of-the-box Power PC 440GX core, and more than four times faster than the out-of-the-box 64-bit MIPS 20Kc processor.
In addition to having a significant advantage in the OAmark scores, Tensilica’s Xtensa LX processor demonstrated much lower code size, which means it requires less memory. Code size results for the Office Automation benchmark were:
- 4,912 bytes – Out-of-the-box Xtensa LX processor
- 5,908 bytes – Out-of-the-box ARM 1026EJ-S processor
- 11,024 bytes – Optimized Xtensa LX processor
- 13,780 bytes – Out-of-the-box MIPS 20Kc processor
- 18,540 bytes – Out-of-the-box IBM PowerPC 440 processor
“For our 1.4 sqmm Xtensa LX processor to have the equivalent speed of a much larger PowerPC core when running the out-of-the-box C code, while having a 4X code size advantage, is a testament to the inherent advantages of the Xtensa base processor architecture,” stated Steve Roddy, vice president of marketing for Tensilica. “Customers looking for outstanding embedded processor power in a small form factor with low code size can quickly benefit from using the Xtensa LX processor, even without utilizing Tensilica’s instruction extension automation technology.”
Tensilica used the EEMBC-provided, ECL-certified C Code with its XPRES (Xtensa PRocessor Extension Synthesis) Compiler to generate the optimized version of the Xtensa LX processor for this benchmark. ANSI-standard C code tuning was performed to expose the natural parallelism inherent in the EEMBC benchmark code. No C intrinsics, no assembly coding, or other Xtensa-specific changes were made to the reference EEMBC C code. The resulting C code could be run on any processor, not just an Xtensa LX processor.
Tensilica’s XPRES Compiler
The XPRES Compiler, used for this benchmark, takes a C/C++ program as input and generates the optimizations necessary to customize the Xtensa LX processor. It can be used in an automatic mode or under full designer control, so the designer can guide the tool, select instructions, and even tune the original application to take better advantage of the added hardware instructions. The XPRES Compiler can generate optimizations for (and thus speed performance of) frequently executed code blocks—such as inner loops—and complex blocks including highly branched code that is almost never optimized using traditional performance tuning methods because of its complexity. The effect is a general acceleration of code performance with significant improvements in the performance of critical inner loops.
EEMBC, the Embedded Microprocessor Benchmark Consortium, develops and certifies real-world benchmarks and benchmark scores to help designers select the right embedded processors for their systems. Every processor submitted for EEMBC benchmarking is tested for parameters representing different workloads and capabilities in communications, networking, consumer, office automation, automotive/industrial, embedded Java, and microcontroller-related applications. With members including leading semiconductor, intellectual property, and compiler companies, EEMBC establishes benchmark standards and provides certified benchmarking results through the EEMBC Certification Labs (ECL).
Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.
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Tensilica, and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
Tensilica’s announced licensees include Agilent, ALPS, AMCC (JNI Corporation), Astute Networks, ATI, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, NEC Laboratories America, NEC Corporation, NetEffect, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., S2io, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, and Victor Company of Japan (JVC).