D&R Headline News (October 2018)

Headlines for Wednesday Oct. 31, 2018

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Imagination introduces industry's most comprehensive GNSS IP core as part of its Ensigma wireless communications portfolio

Imagination Technologies announces the industry’s most comprehensive Global Navigation Satellite System (GNSS) IP offering. The Ensigma Location GNSS IP core supports GPS, GLONASS, Galileo, and BeiDou as well as several Satellite-Based Augmentation Systems (SBAS) including WAAS and EGNOS.

• Cadence Introduces the Tensilica HiFi 5 DSP, the First DSP Optimized for AI Speech and Audio Processing
• SiFive Core IP 7 Series Creates New Class of Embedded Intelligent Devices Powered by RISC-V
• AImotive's aiWare3 Hardware IP Helps Drive Autonomous Vehicles To Production
• GE Power Management licenses SoC-e wire-speed Cryptography IP for GOOSE&Sampled Values Security
• Arteris IP Announces New FlexNoC 4 Interconnect IP with Artificial Intelligence (AI) Package
• Silicon Valley company unveils the first Artificial Intelligence-based Power Exploration platform for electronics systems and semiconductors

Headlines for Tuesday Oct. 30, 2018

• Synopsys Enhances DesignWare Memory Test and Repair Solution for Embedded MRAM
• Rambus Reports Third Quarter 2018 Financial Results
• Rambus Appoints Luc Seraphin as President and Chief Executive Officer
• Credo First to Publicly Demonstrate 112G SerDes in 7nm at TSMC's 2018 China OIP Forum

Headlines for Monday Oct. 29, 2018

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PLDA and MegaChips announce a cooperation to design PCIe controllers and PCIe PHY IP on TSMC's 16nm Process Technology

PLDA, the industry leader in PCI Express® IP solutions and MegaChips, a global semiconductor company specializing in ASIC Solution Services, today announced their collaboration to design a combined PCIe Controller IP and PHY IP solution.

• Silicon Creations' Fractional-N PLL Technology Leveraged at Israel's Bar-Ilan University SoC Lab
• Chinese Firm to Buy NXP Spinoff
• Synopsys Improves Automotive Functional Safety with Fast Soft-Error Analysis
• Synopsys Advances Test Fusion Technology with Test Points to Reduce Manufacturing Costs and Boost Quality
• GLOBALFOUNDRIES and Chengdu Realign Joint Venture Strategy
• Kazan Networks Announces NVMe-oF ASIC Production Release
• Gowin Semiconductor Brings Ultra Low Power Programmable Logic Devices To Market
• Global Semiconductor Sales in September Up 13.8 Percent Year-to-Year
• SigmaStar Deploys CEVA Computer Vision and Deep Learning Platform in its Intelligent Camera SoC
• Intel Reports Tepid Progress on 10 nm
• Moortec To Showcase Its PVT Monitoring IP At the TSMC China OIP Ecosystem Forum in Nanjing
• Real Intent Provides Comprehensive Reset Analysis with Meridian RXV

Headlines for Friday Oct. 26, 2018

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Silex Insight releases IPsec as a hardware block to accelerate IoT, cloud, or edge servers

Silex Insight, leading provider of IP cores for secure computing, is excited to announce that is has released the BA454, an extremely scalable and flexible hardware accelerator implementing the IPsec security protocol. BA454 has been conceived to provide security to high-throughput, time-critical applications, for example in data centers or servers at the heart of IoT, cloud, or edge networks.

Headlines for Thursday Oct. 25, 2018

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eSilicon 56G long-reach 7nm DSP SerDes is now available for licensing

eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today that its 7nm 56G long-reach SerDes is now available for licensing. eSilicon will demonstrate the SerDes during SuperCompute 2018 in Dallas, Texas on November 12-15.

• NovuMind's AI Chip Sparks Controversy
• UltraSoC and ResilTech partner to further functional safety in automotive systems
• DVB-RCS2 Satellite Modulator IP Core from Creonic Now Available
• Renesas Unveils RXv3 CPU Core with Industry-Leading Performance: Powering Up New 32-Bit RX MCU Families
• Xilinx Reports Record Quarterly Revenues And EPS; Raises Fiscal Year 2019 Guidance
• NovuMind Releases Details of Breakthrough AI Chip
• Atmosic Technologies Introduces Innovative Wireless Platforms to Drive Battery-Free Internet of Things

Headlines for Wednesday Oct. 24, 2018

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Synopsys Announces Fastest, Most Power Efficient DDR5 and LPDDR5 IP Solutions

Synopsys today announced new DesignWare® Memory Interface IP solutions supporting the next-generation DDR5 and LPDDR5 SDRAMs. The DDR5 and LPDDR5 IP significantly increase memory interface bandwidth compared to DDR4 and LPDDR4 SDRAM interfaces, while reducing area and improving power efficiency.

• Cadence Custom/AMS Flow Certified on Samsung 7LPP Process Technology
• Analysis: Dialog finds a better way out from under Apple
• CEVA Adds ONNX Support to CDNN Neural Network Compiler
• North American Semiconductor Equipment Industry Posts September 2018 Billings
• Cypress Delivers Smart, Fail-Safe Storage Platform Leveraging Arm Processor for Enhanced Safety and Reliability
• OneSpin Puts Verification on the Move with New PortableCoverage Solution

Headlines for Tuesday Oct. 23, 2018

• Synopsys Custom Design Platform Delivers Breakthrough Analog Simulation and Fusion Technologies
• Synopsys Custom Compiler Doubles New Customer Adoptions, Introduces New Release
• Synopsys FineSim SPICE Cuts Analog Simulation Time by 3X
• Cadence Reports Third Quarter 2018 Financial Results

Headlines for Monday Oct. 22, 2018

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Cadence Accelerates Next-Generation Cloud Datacenter Infrastructure with Industry's First Silicon-Proven, Long-Reach 7nm 112G SerDes IP

Cadence today unveiled the industry’s first silicon-proven, long-reach 112G SerDes IP in 7nm. The Cadence® 7nm 112G PAM-4 SerDes IP delivers industry-leading power, performance and area (PPA) efficiency required to build high-port density networking products for next-generation cloud-scale and telco datacenters.

• MIPI Alliance Enables First Wave of 5G Smartphones
• Silvaco Appoints Babak Taheri as Chief Technology Officer
• IEDM: Intel embeds MRAM in FinFET process
• Rambus Unveils Vaultify Trade for Secure Transaction and Storage of Crypto Assets on Blockchain
• NEC collaborates with Arm to develop secure IoT solutions for Smart Cities using AI
• Stage Tec introduces HSR for Professional Audio Broadcasting using SoC-e Technology
• Arm DesignStart program expands to accelerate Linux-based embedded design
• Dolphin Integration unveils a new RAM dedicated to IoT and Low Power MCU applications in 55 nm, GLOBALFOUNDRIES LPx process
• Sankalp Semiconductor Expands its Design Centre in Hubli
• Percepio Announces Tracealyzer Support for STLINK-V3 Debug Probes

Headlines for Thursday Oct. 18, 2018

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Samsung Complements the Production of its Revolutionary 7nm EUV with Exceptional SAFE Ecosystem Solutions

Samsung Electronics Co., Ltd., a world leader in advanced semiconductor technology, today announced the launch of its new commercial 7LPP, the 7-nanometer (nm) LPP (Low Power Plus) with extreme ultraviolet (EUV) lithography technology for wafer production.

• TSMC Reports Third Quarter EPS of NT$3.44
• Samsung Electronics Starts Production of EUV-based 7nm LPP Process
• Communications Rise To Represent Largest Portion of Foundry Sales
• STMicroelectronics Introduces STM32L5 Ultra-Low-Power Microcontrollers for a More Secured IoT

Headlines for Wednesday Oct. 17, 2018

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eMemory's OTP IP Qualified on 22nm FD-SOI process

eMemory today announced that its one-time programmable non-volatile memory (OTP) IP, NeoFuse, has been qualified for 22nm Fully-Depleted Silicon On-Insulator (FD-SOI), also known as 22FDX, process technology.

• Arteris IP FlexNoC Interconnect Licensed by Iluvatar CoreX for Artificial Intelligence Application
• Silicon Creations Named TSMC Partner of the Year 2018 for Analog / Mixed-Signal IP
• Arm goes higher up the stack for device-to-data IoT security
• IBM, GLOBALFOUNDRIES Enhance Si2 Unified Power Model Standard
• Rambus and Riscure Team Up to Deliver Best-in-class Security Testing Platform for Side-channel Analysis
• IAR Systems leads the way for secure IoT development based on Arm TrustZone and Arm Cortex-M
• More than 100 Major IC vendors, OEMs and Broadcasters Already Adopted Allegro DVT Compliance Streams
• Inside Secure's Latest Whitebox Software Security Tool Brings Mobile Developers New Levels of Protection, Performance and Control
• Wafer Shipments Forecast to Set New Highs Through 2021
• Arasan to demonstrate its I3C Host and Device IP and participate at the I3C Interoperability Session at the 2018 MIPI Devcon in Seoul
• Synopsys Awarded DARPA Electronics Resurgence Initiative Contract for Advanced Emulation Technology
• IAR Systems supports new secure, ultra-low-power Arm Cortex-M33 MCUs from STMicroelectronics

Headlines for Tuesday Oct. 16, 2018

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Arm Neoverse: The modern cloud to edge infrastructure foundation for a world of a trillion intelligent devices

Today at Arm TechCon, Arm disclosed details on a dedicated roadmap and new brand of infrastructure-class IP for 5G networks and next-generation cloud to edge infrastructure.

• L&T Technology Services announces completion of Graphene Semiconductor Services acquisition
• Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instruction-Set Processors for STMicroelectronics
• Cadence Accelerates Arm-Based Server Development by Automating Arm Pre-Silicon Bare Metal Compliance Testing
• Cadence Verification Suite Enabled on Arm-Based HPC Datacenters
• Synopsys Enables Tapeout Success for Early Adopters of Arm Neoverse IP
• UltraSoC announces integrated multi-core debug, visualization and data science / analytics suite
• SiFlower Licenses and Deploys CEVA's 802.11ac Wi-Fi IP in its Smart Home Access Point SoC
• OPENEDGES unveils world-first Memory Subsystem IP solution coupling Network-on-Chip (NoC) interconnect with DDR memory controller
• ALTEN Calsoft Labs Acquires Si2Chip, a VLSI Chip Design Company
• Eta Compute Launches Machine Learning Platform with Ultra-Low-Power Consumption for Edge Devices

Headlines for Monday Oct. 15, 2018

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Advanced Technology Key to Strong Foundry Revenue per Wafer

Analysis shows more than a 16x difference between the average revenue generated by 0.5µ 200mm wafers ($370) and ≤20nm 300mm wafers ($6,050).

• Allegro DVT Introduces High Dynamic Range and High Frame Rate System Compliance Streams for DVB UHDTV
• Moortec to show off its advances in PVT monitoring for 40nm, 28nm, 16nm, 12nm and 7nm at ARM TechCon in San Jose
• JPEG-XS standard preview by intoPIX at SMPTE ATC 2018
• Intel, Arduino and myDevices join the rapidly expanding Arm Pelion IoT Platform ecosystem
• Synopsys Delivers Platform Architect Ultra to Enable the Next Wave of AI SoCs
• Achronix to Demonstrate Speedcore eFPGA's Flexibility at Arm TechCon
• Flex Logix to Demonstrate Modular eFPGA at ARM TechCon
• Vidatronic Signs Schoenduve Corporation as Its Sales Representative for Northern California and Nevada
• Xilinx and Huawei Announce the First FPGA Cloud-based Real-time Video Streaming Solution in China
• CEVA's 2018 Technology Symposium Series Coming to Taiwan, China and Japan
• Socionext Develops World's First HDMI 2.1 Compatible Video Processing Chips

Headlines for Thursday Oct. 11, 2018

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Dialog Semiconductor and Apple enter agreement

Dialog Semiconductor plc (XETRA:DLG), today entered into an agreement with Apple Inc. to license its power management technologies, transfer certain of its assets and over 300 employees from Dialog to support chip research and development.

• Xylon Unveils New Panoramic Multi-Sensor Camera Demo at Xilinx Developer Forum
• Spectral & NSCore Announce Strategic Relationship that Significantly Expands Access and Distribution of MTP/OTP Memory Compilers to accelerate SOC integration of NVRAM & Low Power SRAMs for IOT applications
• Mixel MIPI C-PHY/D-PHY Combo IP Integrated into Synaptics VXR7200 IC Enabling Next Generation VR Headsets
• Arasan to demonstrate its MIPI DSI, CSI, C-PHY and D-PHY IP Cores at the 2018 MIPI Member Meeting Asia
• Silvaco to Showcase Octal SPI in Presentation at ARM TechCon
• GLOBALFOUNDRIES Expands RFwave Partner Program to Speed Time-to-Market for Wireless Connectivity, Radar and 5G
• IntelliProp to Exhibit at SC18 in Dallas, TX
• Power Regulation IPs from Dolphin Integration, now Silicon Proven on GLOBALFOUNDRIES 22FDX Technology Platform

Headlines for Wednesday Oct. 10, 2018

• NXP Secures the Edge with Two Industry-First Multi-Core Arm Cortex-M33 Solutions
• Rambus and Phison Sign Patent License
• Cadence to Demonstrate System and Automotive Solutions at Arm TechCon 2018
• Gowin Semiconductor's GW1NS Family of Products Named Arm TechCon 2018 Innovation Award Finalist For Design Innovation of the Year
• Cadence Recognized with Four 2018 TSMC Partner of the Year Awards
• Sankalp Semiconductor Opens Second Design Centre in Bangalore
• Truechip Successfully hosted TrueConnect 2018 - The 2nd Annual Technical Conference

Headlines for Tuesday Oct. 09, 2018

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Arteris FlexNoC Interconnect IP Licensed by Enflame (Suiyuan) Technology for Multiple Artificial Intelligence (AI) Chips

Arteris IP today announced that Enflame (Suiyuan) Technology has purchased multiple licenses of Arteris FlexNoC interconnect IP for use as the on-chip communications backbone of their artificial intelligence (AI) training chips for use in cloud datacenters.

• Synopsys to Showcase Optimized Solutions and Expert Services for Arm-based Designs at Arm TechCon 2018
• Inside Secure Selected by Norway's Nationwide Debit Card System to Secure Mobile Contactless Payments
• QuickLogic Announces Silicon-Proven ArcticPro eFPGA on GLOBALFOUNDRIES 22FDX Process
• Mentor releases optimized flow, new fill automation for GLOBALFOUNDRIES' 22FDX IC manufacturing process
• TSMC September 2018 Revenue Report
• UMC Reports Sales for September 2018

Headlines for Monday Oct. 08, 2018

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Andes Announces over 1.2 GHz RISC-V Cores Series at 28nm: A25/AX25 and N25F/NX25F

Andes Technology, a founding member of the RISC-V Foundation and the leading Taiwan-based supplier of 32/64-bit embedded CPU cores with solutions serving in excess of 2.5-Billion SoCs covering a wide range of applications, today announced the availability of the latest four members of the AndeStar™ V5 high efficiency processor series.

• Rambus Renews Patent License with NVIDIA
• Arasan Chip Systems Relocates it's Corporate Headquarters to accommodate future growth
• Live webinar by Dolphin Integration: how to design an energy-efficient SoC in advanced nodes for increasing battery lifetime for IoT applications

Headlines for Friday Oct. 05, 2018

• Apple, Amazon Refute China Chip Hacking Story
• GUC Monthly Sales Report - Sep 2018
• Vidatronic Selects Redtree Solutions as Its Sales Representative for European and Middle-Eastern Markets
• Arm awarded TSMC Partner of the Year award for Processor IP

Headlines for Thursday Oct. 04, 2018

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Northwest Logic and Mixel Delivering C-PHY/D-PHY Combo MIPI IP Solution

Northwest Logic and Mixel® announced today that their MIPI® CSI-2SM and DSI-2SM solutions which utilize MIPI C-PHY SM / D-PHY SM have been deployed and silicon proven in 28nm, 40nm, 55nm and 65nm process nodes. These high performance, low power, cost effective solutions contain controllers from Northwest Logic and PHYs from Mixel.

• Silicon Valley Company unveils revolutionary Artificial Intelligence (AI) driven Processor Generator
• TSMC Goes Photon to Cloud
• Synopsys and TSMC Collaborate to Develop Portfolio of DesignWare IP for TSMC N7+ FinFET Process
• DRAM Market Braces For Slower Growth
• Synopsys Design Platform Enabled for TSMC's Multi-die 3D-IC Advanced Packaging Technologies
• TSMC Recognizes Synopsys with Four Partner Awards at the Open Innovation Platform Forum Event
• eMemory Receives 2018 TSMC IP Partner Award
• M31 Receives TSMC's 2018 Partner of the Year Award for Specialty Process IP
• Omnitek Demonstrates Highest Performance Convolutional Neural Network on an FPGA

Headlines for Wednesday Oct. 03, 2018

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TSMC Announces OIP Ecosystem Enabled in the Cloud

TSMC today announced the initial availability of its Open Innovation Platform® Virtual Design Environment (OIP VDE), which enables semiconductor customers to securely design in the cloud, leveraging TSMC OIP design infrastructures within the flexibility of cloud infrastructures.

• Xilinx Unveils Versal: The First in a New Category of Platforms Delivering Rapid Innovation with Software Programmability and Scalable AI Inference
• Analog Bits to demonstrate Low Power SERDES at TSMC's Open Innovation Platform Ecosystem Forum
• Synopsys Announces Availability of TSMC-certified IC Design Environment in the Cloud
• Cadence Expands its Cloud Portfolio with Delivery of TSMC OIP Virtual Design Environment
• SiFive Welcomes Former Tesla Executive to Lead Global Growth Strategy
• Wi-Fi Alliance introduces Wi-Fi 6

Headlines for Tuesday Oct. 02, 2018

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Silicon Creations Highlights PLL Developments in 22nm, 12nm, 7nm, and 5nm at TSMC OIP Ecosystem Forum

Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), announced a wide variety of IP offerings in TSMC’s 5FF, 7FF, 7FF+, 12FFC, and 22ULP/ULL process nodes, designed to support customer’s SoC timing demands.

• Cadence Delivers Support for TSMC InFO_MS Advanced Packaging Technologies
• Arteris IP FlexNoC Interconnect and Resilience Package Licensed by Autotalks for Automotive V2X Communications Chipsets
• Xilinx Launches the World's Fastest Data Center and AI Accelerator Cards
• M31 Technology's Diversified TSMC 28HPC+ ULL Memory Compilers Empower More Flexible SoC Design Architecture
• Synopsys Digital and Custom Design Platforms Certified on TSMC 5-nm EUV-based Process Technology

Headlines for Monday Oct. 01, 2018

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Synopsys Delivers Automotive-Grade IP in TSMC 7-nm Process for ADAS Designs

Synopsys today announced delivery of automotive-grade DesignWare® Controller and PHY IP for TSMC's 7-nanometer (nm) FinFET process. The DesignWare LPDDR4x, MIPI CSI-2 and D-PHY, PCI Express® 4.0, and security IP implement advanced automotive design rules for TSMC 7-nm process to meet the stringent reliability and operation requirements of ADAS and autonomous driving system-on-chips (SoCs).

• Arm expands design possibilities with free Cortex-M processors for Xilinx FPGAs
• Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation
• Dolphin Integration accelerates the development of energy-efficient SoCs for Arm-based secure IoT devices
• ESD Alliance Reports EDA Industry Revenue Increase for Q2 2018
• GOWIN Semiconductor Licenses Andes Technology RISC-V CPU Core For Its Arora GW-2A FPGA Family Products
• Attopsemi Technology Provided a Talk Along with an AIoT Panel at the 6th FD-SOI Forum in Shanghai
• Intel Promises to Boost 14nm Production
• Open-Silicon to Demonstrate and Present on Custom SoC Platform Solutions for AI Applications at the TSMC OIP Event in Santa Clara