Design & Reuse

DSP Group taps Tality as SoC design center

DSP Group taps Tality as SoC design center

EETimes

DSP Group taps Tality as SoC design center
By Michael Santarini, EE Times
August 29, 2000 (3:49 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000829S0064

SAN JOSE, Calif. — DSP Group Inc. has approved Tality Corp., the electronic design services spin-off of Cadence Design Systems Inc., as a system-on-chip (SoC) design center for its customers.

Under the nonexclusive agreement, Tality will provide design-to-manufacture chips to licensees of DSP Group's SmartCores family, the companies said..

The certification will give Tality greater access to DSP Group's new technology and intellectual property (IP), which Tality will integrate into SoC designs for mutual customers. Tality will also tap DSP Group's SmartCores IP to produce hard cores that comply with the design rules of target foundries.

Tality's primary SoC design center, in Livingston, Scotland, created the Aplio Trio, a single-chip processor for Internet telephony that contains two Oak DSP cores from DSP Group.

Copyright © 2003 CMP Media, LLC | Privacy Statement