True Circuits, Inc. Latest News

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True Circuits Introduces the JSPICE™ Design Environment (JDE™) at the Design Automation Conference	Jun. 24, 2024

True Circuits Attends 60th Design Automation Conference, Celebrates 25 Years of Timing Excellence	Jul. 06, 2023

True Circuits Announces Availability of JSPICE™ Simulation and Design Environment	Jul. 05, 2023

True Circuits Attends Design Automation Conference	Jul. 08, 2022

True Circuits Introduces New Synthesizable Precision PLL and Synthesizable Micro PLLs and DLLs and Demonstrates Silicon Proven DDR PHY	Dec. 06, 2021

True Circuits Participates in First Virtual DAC! Showcases Silicon Proven PLLs, DLLs and DDR 4/3 PHYs	Jul. 20, 2020

True Circuits Demonstrates Silicon Proven DDR 4/3 PHY at the Design Automation Conference	May. 31, 2019

True Circuits Attends Design Automation Conference, Celebrates 20 Years of Timing Excellence!	Jun. 22, 2018

True Circuits Provides Low Power PLL Technology to SiFlower in China	May. 15, 2018

True Circuits Signs Multi-year PLL License with Canaan Creative in China	May. 07, 2018

True Circuits Signs Five Year PLL License with Tsinghua University in China	Nov. 07, 2017

True Circuits Attends the TSMC 2017 China OIP Ecosystem Forum	Nov. 07, 2017

True Circuits Attends the TSMC 2017 NA OIP Ecosystem Forum	Sep. 11, 2017

True Circuits Attends Design Automation Conference	Jun. 14, 2017

True Circuits Showcases State-of-the-art Ultra PLL, Low Power IoT PLL and 16nm IP Portfolio at TSMC NA Technology Symposiums	Mar. 15, 2017

True Circuits Attends Design Automation Conference Showcases State-of-the-art Ultra PLL, Low Power IoT PLL and Revolutionary DDR 4/3 PHY	Jun. 01, 2016

True Circuits Announces New Line of Low Power, 32KHz IoT PLLs	Mar. 14, 2016

True Circuits Attends Design Automation Conference, Showcases State-of-the-art Ultra PLL and Revolutionary DDR 4/3 PHY	Jun. 08, 2015

True Circuits Announces New Line of PLLs, the "Ultra PLL", that offers exceptional performance, features and ease of use	Apr. 06, 2015

True Circuits Showcases Revolutionary DDR 4/3 PHY and latest PLL and DLL Hard Macros at DAC	May. 30, 2014

True Circuits Introduces a Revolutionary New DDR 4/3 PHY	Jun. 03, 2013

True Circuits Attends Design Automation Conference	Jun. 04, 2012

True Circuits PLLs Used by ARM in Verification of Cortex-A9 Microprocessor Cores	Jan. 24, 2011

True Circuits Announces New Line of General Purpose PLLs Optimized for Low Power, Area Sensitive and Low Cost Applications	Sep. 01, 2010

True Circuits Attends DAC, Features Complete Line of PLL and DLL IP	Jul. 22, 2009

True Circuits Announces New Line of 65nm Timing IP; Customers' Product Shipments Planned for 2007	Dec. 04, 2006

True Circuits Features New Line of 65nm PLL & DLL Intellectual Property for ASIC, FPGA and SoC Designs at Chartered Technology Forum 2006 - USA	Sep. 26, 2006

True Circuits PLLs Selected by Icera	Apr. 25, 2006

True Circuits Moves to Larger Headquarters	Apr. 14, 2006

True Circuits Analog PLL & DLL Hard Macros Featured at FSA Suppliers Expo	Sep. 30, 2005

True Circuits Introduces New Line of High Resolution Clock Generator PLLs	Sep. 23, 2005

True Circuits Analog PLL & DLL Hard Macros Featured at Chartered Technology Forum 2005	Sep. 13, 2005

True Circuits Attends Design Automation Conference, Features Complete Line of PLL and DLL Intellectual Property for ASIC, FPGA and SoC Designs	Jun. 06, 2005

True Circuits PLL and DLL Hard Macros Featured at TSMC Technology Symposiums in San Jose and Boston	Apr. 20, 2005

True Circuits Selects Amos Technologies to Distribute Its Silicon-Proven Timing Intellectual Property	Nov. 08, 2004

TriCN Signs Reseller Agreement with True Circuits for Silicon-Proven Timing IP	Oct. 25, 2004

True Circuits Introduces New Line of Phase-Locked Loop Hard Macros; Significantly Smaller PLL Sizes Achieved Without Sacrificing Performance	Jun. 08, 2004

Leopard Logic Selects True Circuits IP for Gladiator CLD Configurable Logic Devices	May. 20, 2004

True Circuits Selects The LogicWorks to Distribute Its Silicon-Proven Timing Intellectual Property	Mar. 23, 2004

True Circuits Analog IP Ships in Ubicom's Wireless Network Processor	Mar. 16, 2004

True Circuits PLLs are Recognized with a Wireless Systems Design 2004 Industry Award	Feb. 11, 2004

True Circuits PLL Critical to Parama Networks' new ADM-on-a-Chip	Jan. 14, 2004

True Circuits Announces NEC Electronics Corporation Has Implemented a Low-jitter PLL in their SPI-4.2 Interface Hard Macro	Oct. 22, 2003

True Circuits Introduces Delay-Locked Loop Hard Macros	Oct. 08, 2003

True Circuits Introduces Spread Spectrum and Low Bandwidth Phase-Locked Loop Hard Macros	May. 05, 2003

True Circuits Analog IP Enables Oak Technology to Expedite HDTV Circuit Design	Nov. 04, 2002

True Circuits Joins Design & Reuse Web Portal for IP and SoC Exchange	Aug. 27, 2002