180nm FTP Non Volatile Memory for Standard CMOS Logic Process
4K/8K Scalable Multi-Format Video Decoding IP Core
HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard
MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm)
Imagination DXS GPU officially certified as ASIL-B compliant
Flex Logix Acquired By Analog Devices
Oriole Networks Selects EnSilica as ASIC Partner and Contract Award for Photonics Controller ASIC
CANsec: Security for the Third Generation of the CAN Bus
Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning
A new era for embedded memory
UALink™ Shakes up the Scale-up AI Compute Landscape
Flash Forward: MRAM and RRAM Bring Embedded Memory and Applications into the Future
Hardware-Assisted Verification: Unlocking the Future of Chip and System Design
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