Aldec Provides Xilinx® Foundation Series[tm] Users a Seamless Schematic Import and Design Reuse Option

Aldec Provides Xilinx® Foundation Series[tm] Users a Seamless Schematic Import and Design Reuse Option

Henderson, Nevada, April 17, 2000 -- Aldec, Inc., a leading supplier of HDL design entry and verification software for programmable logic designs, announced today that it will ship FAST-Port [tm] software for direct importing of Foundation Series projects, schematics and libraries into the Active-HDL4.0XE (Xilinx Edition) design platform. The FAST-Port software will allow thousands of Xilinx Foundation Series users to smoothly migrate their mixed schematic, HDL and FSM designs to a VHDL / Verilog based design platform. Since the design import operation is automatic, there is no need for any manual tweaking of imported designs or associated testbenches. The imported schematics and projects will look identical in Active-HDL as in Foundation, simplifying continuation of project development and facilitating Design Reuse in an HDL Centric Design Environment.

 "The Active-HDL 4.0XE product is unlike any other Xilinx third-party software tool. It is a real design productivity booster and provides engineers complete schematic Design Reuse support," stated Michael O?Brien, Product Marketing Manager at Aldec.

 Why import a schematic into Active-HDL?

 
• 50 times simulation speed increase over Xilinx Foundation Series
• Additional hardware/software options raise performance even higher
• Unlimited design size
• Maintains the original design hierarchy
• Provides Unrestricted VHDL, Verilog or EDIF Netlist simulation
• Automatically generate a VHDL or Verilog testbench

Million Gate Device Support
The Active-HDL 4.0XE design environment has been tested with million gate Virtex designs. By importing Foundation Series schematics into 4.0XE, the user can quickly apply existing designs or reuse schematic design modules in their new project. The imported schematics can be mixed in Active-HDL with VHDL and Verilog blocks and simulated with VHDL or Verilog testbenches.

 Availability
Active-HDL 4.0XE is sold directly by Aldec. The product is priced at $2,995.00 and includes a Project Manager, HDL Editor, State Machine Editor, Block Diagram Editor/ Schematic Editor, automatic testbench generation, waveform viewer and editor, and the choice of a VHDL or Verilog simulation kernel. By purchasing 4.0XE before May 31, 2000, all orders will include the FAST-Port Foundation Project Import option (a $2,500 value) at no cost. The first year of maintenance is included in the sale price and all licenses sold by Aldec are permanent and non-expiring. A 100% credit can be applied within the first 6 months towards any Active-HDL upgrade. To take advantage of this offer, contact Aldec at 800-487-8743 or order On-line at www.aldec.com.

 About Aldec
Aldec has offered PC-based design entry and simulation solutions to FPGA designers for more then 15 years. During this time, Aldec has signed several OEM agreements with IC vendors, such as Xilinx, Inc. (NASDAQ:XLNX) and Cypress Semiconductor Corp. (NYSE:CY) Aldec, Inc., headquartered in Henderson, Nevada, produces a universal suite of Windows based EDA tools that allow design engineers to implement their designs using several different design entry methods (Schematic Capture, State Machine, Block Diagram, VHDL, Verilog or ABEL). Aldec incorporates patented simulation technology and several design entry tools to provide a complete design entry and simulation solution. Founded in 1984, the company continues to evolve in the Windows-based EDA market as the fastest growing privately held EDA supplier in the world. Additional information about Aldec is available at http://www.aldec.com.
 
 

Previous Page