12-bit, 5 MSPS ADC with 8:1 Input Mux in 6nm CMOS
2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load
USB 2.0 picoPHY in TSMC (40nm, 28nm)
Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
Synopsys Announces Industry's First Ultra Ethernet and UALink IP Solutions to Connect Massive AI Accelerator Clusters
Crypto Quantique upgrades QuarkLink IoT device security platform for post-quantum cryptography (PQC)
Arasan Announces immediate availability of its SPMI IP (System Power Management Interface)
The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
Advanced Packaging and Chiplets Can Be for Everyone
Timing Optimization Technique Using Useful Skew in 5nm Technology Node
Enabling Massive AI Clusters with the Industry's First Ultra Ethernet and UALink IP Solutions
Audio Transport in DisplayPort VIP
HDT Bluetooth: the Next Step in High Quality Audio Streaming
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