AI accelerator - 2.25K, 4.5K, or 9K INT8 MACs
PCIe Controller for USB4 Hosts and Devices, supporting PCIe Tunneling
NVMe Host IP on Polarfire SoC FPGA
USB-C 3.2/DisplayPort PHY IP for Samsung 4LPE
Expedera Introduces Its Origin Neural Engine IP With Unrivaled Energy-Efficiency and Performance
PLDA Introduces a Complete Line of PCIe IP for USB4, Enabling PCIe Support in USB4 Hubs, Hosts and Devices
Logic Design Solutions Introduces the first NVMe HOST IP on POLARFIRE SoC FPGA
A short primer on instruction set architecture
Building security into an AI SoC using CPU features with extensions
Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - Optimizing latency key factor
What is an ASIP?
Design IP Sales Grew 16.7% in 2020, Best Growth Rate Ever!
SiFive RISC-V Proven in 5nm Silicon
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