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Headline Sign Up for SoC News Alert |
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Cadence Demonstrates IP Test Silicon for PCI Express 6.0 Specification on TSMC N5 Process |
Oct. 21, 2021 |
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Cadence Digital and Custom/Analog Flows Achieve the Latest TSMC N3 and N4 Certifications |
Oct. 21, 2021 |
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Cadence Introduces Comprehensive Safety Solution for Faster Certification of Automotive and Industrial Designs |
Oct. 19, 2021 |
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Cadence Accelerates System Innovation with Breakthrough Integrity 3D-IC Platform |
Oct. 07, 2021 |
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Cadence Accelerates Development of Mobile, Automotive and Hyperscale Systems with the Helium Virtual and Hybrid Studio |
Sep. 23, 2021 |
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Cadence Accelerates Intelligent SoC Development with Comprehensive On-Device Tensilica AI Platform |
Sep. 13, 2021 |
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Cadence and Samsung Accelerate 3nm Mixed-Signal Silicon |
Sep. 09, 2021 |
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Picocom Accelerates 5G Communications SoC Development with Cadence Palladium Emulation |
Aug. 19, 2021 |
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Cadence Tensilica Xtensa Processors Address Most Stringent Automotive Functional Safety Requirements with Full ISO 26262 Compliance to ASIL-D |
Jul. 28, 2021 |
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Cadence Announces Anirudh Devgan to Become CEO in December 2021; Lip-Bu Tan to Transition to Role of Executive Chairman at That Time |
Jul. 27, 2021 |
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Cadence Extends Digital Design Leadership with Revolutionary ML-based Cerebrus, Delivering Best-in-class Productivity and Quality of Results |
Jul. 23, 2021 |
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Cadence and UMC Collaborate on 22ULP/ULL Reference Flow Certification for Advanced Consumer, 5G and Automotive Designs |
Jul. 13, 2021 |
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New Cadence Tensilica FloatingPoint DSP Family Delivers Scalable Performance for a Broad Range of Compute-Intensive Applications |
Jun. 18, 2021 |
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Sequans Communications Adopts Cadence RF Solution to Develop Next-Generation 5G IoT Platform |
Jun. 11, 2021 |
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New Cadence Allegro X Design Platform Revolutionizes System Design |
Jun. 09, 2021 |
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EdgeCortix Collaborates with Cadence to Accelerate AI Chip Design |
Jun. 03, 2021 |
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Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes |
May. 31, 2021 |
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Cadence Unleashes Clarity 3D Solver on the Cloud for Straightforward, Secure and Scalable Electromagnetic Analysis of Complex Systems on AWS |
May. 27, 2021 |
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Cadence Collaboration with Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs |
May. 26, 2021 |
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JVCKENWOOD Deploys Cadence Spectre FX Simulator and Comprehensive Design Flows to Improve Productivity |
May. 24, 2021 |
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Cadence Introduces the Spectre FX FastSPICE Simulator Delivering up to 3X Performance Gains with Superior Accuracy |
May. 24, 2021 |
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Cadence Accelerates Cloud Hyperscale Infrastructure with Third-Generation 112G-LR SerDes IP on TSMC's N5 Process |
May. 24, 2021 |
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Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process |
May. 24, 2021 |
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Cadence Wins Four 2020 Samsung Foundry SAFE EDA Awards |
May. 04, 2021 |
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Cadence Extends Popular Tensilica Vision and AI DSP IP Product Line with New DSPs Targeting High-End and Always-On Applications |
Apr. 23, 2021 |
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Cadence Pegasus Verification System Certified for Samsung Foundry 5nm and 7nm Process Technologies |
Apr. 19, 2021 |
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Cadence Collaborates with Samsung Foundry to Accelerate Hyperscale Computing SoC Design for Process Nodes Down to 4nm |
Apr. 09, 2021 |
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Cadence Delivers Automotive Reference Flow for Samsung Foundry 14LPU Process Technology |
Apr. 09, 2021 |
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Cadence Unveils Next-Generation Palladium Z2 and Protium X2 Systems to Dramatically Accelerate Pre Silicon Hardware Debug and Software Validation |
Apr. 05, 2021 |
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Cadence Successfully Tapes Out Tensilica SoC on GLOBALFOUNDRIES 22FDX Platform Using Adaptive Body Bias Feature |
Mar. 24, 2021 |
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GLOBALFOUNDRIES and Cadence Add Machine Learning Capabilities to DFM Signoff for GF's Most Advanced FinFET Solutions |
Mar. 24, 2021 |
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Cadence Unveils Next-Generation Sigrity X for Up to 10X Faster System Analysis |
Mar. 17, 2021 |
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Cadence Completes Acquisition of NUMECA |
Feb. 24, 2021 |
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Cadence to Acquire NUMECA to Expand System Analysis Capabilities with Computational Fluid Dynamics |
Jan. 20, 2021 |
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Samsung Foundry Certifies Cadence System Analysis and Advanced Packaging Design Tool Flow for 2.5/3D Chip Designs |
Dec. 17, 2020 |
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Samsung Foundry Adopts Spectre X Simulator for 5nm Design |
Dec. 08, 2020 |
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Rockley Photonics Collaborates with Cadence to Create a High-Performance System for Hyperscale Data Centers |
Dec. 03, 2020 |
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Vidatronic Achieves up to 10X Speedup Using the Cadence Spectre X Simulator |
Nov. 12, 2020 |
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Cadence Achieves Industry-First ASIL B(D) Compliance Certification for Automotive Radar, Lidar and V2X DSP IP |
Nov. 09, 2020 |
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Cadence Wins Four 2020 TSMC OIP Partner of the Year Awards |
Nov. 02, 2020 |
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Cadence Custom/AMS Flow Certified for the Samsung Foundry 3nm Advanced Process Technology for Early Design Starts |
Oct. 29, 2020 |
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Cadence Reports Third Quarter 2020 Financial Results |
Oct. 20, 2020 |
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TriEye Shortens Time to Market for Next-Generation CMOS-Based SWIR Image Sensors with the Cadence Spectre X Simulator |
Oct. 14, 2020 |
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New Cadence Clarity 3D Transient Solver Delivers Up to 10X Faster System-Level EMI Simulation |
Oct. 13, 2020 |
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Cadence Brings Verification IP to the Chip Level with New System VIP Solution |
Oct. 13, 2020 |
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Cadence Pegasus Verification System Certified for TSMC N16, N12 and N7 Process Technologies |
Oct. 12, 2020 |
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Cadence Announces Complete DDR5/LPDDR5 IP Solution for TSMC N5 Process Technology |
Oct. 08, 2020 |
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Cadence Announces Broad IP Collaboration with GLOBALFOUNDRIES on 12LP/12LP+ Solutions |
Sep. 28, 2020 |
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GLOBALFOUNDRIES Collaborates with Cadence on Availability of Mixed-Signal OpenAccess PDK for 22FDX Platform to Enable Advanced Mixed-Signal and mmWave Design |
Sep. 28, 2020 |
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Kneron Boosts On-Device Edge AI Computing Performance with Cadence Tensilica IP |
Sep. 03, 2020 |
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Cadence IC Packaging Reference Flow Certified for the Latest TSMC Advanced Packaging Solutions |
Aug. 26, 2020 |
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Cadence Announces Availability of UltraLink D2D PHY IP on TSMC N7, N6 and N5 Processes |
Aug. 25, 2020 |
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Nuvoton Accelerates the Development of its MCU Designs with the Cadence Palladium Z1 Enterprise Emulation Platform |
Aug. 18, 2020 |
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Cadence Delivers Machine Learning-Optimized Xcelium Logic Simulation with up to 5X Faster Regressions |
Aug. 13, 2020 |
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Moore's Law Isn't Slowing down - Just Ask System Companies |
Jul. 21, 2020 |
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Cadence Reports Second Quarter 2020 Financial Results |
Jul. 21, 2020 |
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Cadence Collaborates with TSMC and Microsoft to Reduce Semiconductor Design Timing Signoff Schedules with the Cloud |
Jun. 16, 2020 |
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Efinix Completes Trion FPGA Family for Edge Computing, AI/ML and Vision Processing Applications Using Cadence Digital Full Flow Solution |
Jun. 11, 2020 |
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Cadence Achieves Digital and Custom/Analog EDA Flow Certification for TSMC N6 and N5 Process Technologies |
Jun. 03, 2020 |
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Ambarella Adopts Cadence Clarity 3D Solver for AI Vision Processor Development |
Jun. 01, 2020 |
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Cadence to Optimize Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development |
May. 27, 2020 |
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Cadence Delivers 10 New Verification IP Targeting Automotive, Hyperscale Data Center and Mobile Applications |
May. 19, 2020 |
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Cadence Digital Full Flow Optimized to Deliver Improved Quality of Results with Up to 3X Faster Throughput |
May. 19, 2020 |
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Cadence Expands Design IP Portfolio with 56G Long-Reach PAM4 SerDes on TSMC N7 and N6 Processes |
May. 18, 2020 |
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Cadence Reports First Quarter 2020 Financial Results |
Apr. 21, 2020 |
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Cadence Digital Full Flow Optimized to Deliver Improved Quality of Results with Up to 3X Faster Throughput |
Mar. 17, 2020 |
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Cadence Elects Ita Brennan and Lewis Chew to Board of Directors |
Mar. 17, 2020 |
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Cadence Tensilica HiFi IP Accelerates AI Deployment with Support for TensorFlow Lite for Microcontrollers |
Mar. 12, 2020 |
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Cadence Collaborates with STMicroelectronics on Networking, Cloud and Data Center Electronics |
Mar. 09, 2020 |
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Dover Microsystems and Cadence Partner to Deliver Secure Processing with Silicon-Layer Security for Mission-Critical Applications |
Mar. 09, 2020 |
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Cadence Announces Industry's First Verification IP for PHY Covering Multiple Protocols |
Feb. 26, 2020 |
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Cadence Furthers Expansion in 5G RF Communications with Acquisition of Integrand |
Feb. 14, 2020 |
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Cadence Reports Fourth Quarter 2019 Financial Results |
Feb. 13, 2020 |
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Cadence Completes Acquisition of AWR Corporation from National Instruments |
Jan. 16, 2020 |
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Cadence Expands Collaboration with Broadcom for 5nm and 7nm Designs |
Jan. 14, 2020 |
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LC3 for Bluetooth LE Audio Now Available for Cadence Tensilica HiFi DSPs |
Jan. 07, 2020 |
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Global Unichip Corporation Uses Cadence Digital Implementation and Signoff Flow to Deliver Advanced-Node Designs for AI and HPC Applications |
Dec. 10, 2019 |
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Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation |
Dec. 03, 2019 |
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Cadence to Acquire AWR Corporation from National Instruments to Accelerate System Innovation for 5G RF Communications |
Dec. 03, 2019 |
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New Cadence UltraLink D2D PHY IP for Die-to-Die Connectivity Enables High-Performance Applications with Cost-Effective Packaging |
Nov. 13, 2019 |
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Cadence Announces Tempus Power Integrity Solution for Signoff Timing-Aware IR Drop Analysis |
Nov. 06, 2019 |
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Cadence Presented with Four 2019 TSMC Partner of the Year Awards |
Oct. 31, 2019 |
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Cadence Announces First-to-Market NVMe 1.4 Verification IP for High-Performance Computing |
Oct. 22, 2019 |
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Cadence Reports Third Quarter 2019 Financial Results |
Oct. 22, 2019 |
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Cadence 3D-IC Advanced Packaging Integration Flow Certified by Samsung Foundry for its 7LPP Process Technology |
Oct. 18, 2019 |
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Cadence Automotive Reference Flow Certified by Samsung Foundry for Advanced-Node Design Creation |
Oct. 18, 2019 |
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Cadence Custom/AMS Flow Certified for Samsung 5LPE Process Technology |
Oct. 17, 2019 |
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Cadence Collaborates with Arm and Samsung Foundry on Delivery of 5LPE Flow for Mission-Critical Applications Using Next-Generation "Hercules" CPU |
Oct. 09, 2019 |
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Adesto and Cadence Collaborate to Expand xSPI Ecosystem for Emerging IoT Devices |
Oct. 02, 2019 |
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Cadence Digital and Signoff Full Flow and Custom/Analog Tools Certified for TSMC N6 and N5/N5P Process Technologies |
Sep. 25, 2019 |
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Cadence and UMC Collaborate on Certification of Analog/Mixed-Signal Flow for 28HPC+ Process |
Aug. 06, 2019 |
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Cadence Reports Second Quarter 2019 Financial Results |
Jul. 23, 2019 |
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Cadence Introduces Conformal Litmus to Deliver Fastest Path to Full-Chip Constraints and CDC Signoff |
Jul. 22, 2019 |
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Innovium Adopts the Cadence Innovus Implementation System for Its Highly Scalable Switch Silicon Family for Data Centers |
Jul. 22, 2019 |
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Cadence Delivers Portable Test and Stimulus Methodology and Library |
Jul. 17, 2019 |
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NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow |
Jul. 12, 2019 |
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Cadence Digital Full Flow Achieves Certification for Samsung Foundry 5LPE Process Technology |
Jul. 03, 2019 |
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Cadence Announces First-to-Market DisplayPort 2.0 Verification IP |
Jun. 26, 2019 |
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Acacia Communications Adopts Cadence Palladium Z1 Enterprise Emulation Platform to Accelerate Optical Networking Development |
Jun. 19, 2019 |
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Toshiba Selects Cadence Tensilica Vision P6 DSP as Image Recognition Processor for its Next-Generation ADAS Chip |
Jun. 13, 2019 |
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Socionext Adopts the Cadence Full-Flow Digital and Signoff Tools for 7nm Designs |
Jun. 05, 2019 |
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Cadence Expands Customer-Managed Cloud Options with New Cloud Passport Partner Program |
Jun. 04, 2019 |
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Cadence Introduces the Spectre X Simulator, a Massively Parallel Circuit Simulator Delivering Up to 10X Faster Simulation with the Same Golden Accuracy |
Jun. 04, 2019 |
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NVIDIA Deploys the New Cadence Protium X1 Platform to Accelerate Software Development of Large-Capacity GPUs |
May. 28, 2019 |
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Cadence Launches Protium X1, the First Scalable, Data Center-Optimized Enterprise Prototyping System for Early Software Development |
May. 28, 2019 |
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Cadence Full-Flow Digital and Signoff Tools Optimized for New 7nm Arm Cortex-A77 CPU |
May. 27, 2019 |
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Thinci Deploys Full Cadence Verification Suite for AI Designs, Accelerating Project Schedule by Months |
May. 23, 2019 |
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Cadence Palladium and Protium Platforms Enable Innovium to Accelerate First-Pass Silicon Success for the Data Center Market |
May. 20, 2019 |
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New Cadence Tensilica Vision Q7 DSP IP Doubles Vision and AI Performance for Automotive, AR/VR, Mobile and Surveillance Markets |
May. 15, 2019 |
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Cadence Announces Broad Next-Generation Memory Standard Support in Samsung Foundry's Advanced Process Technologies |
May. 15, 2019 |
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Cadence Tapes Out 112G Long-Reach SerDes IP on Samsung Foundry's 7LPP Process Technology |
May. 15, 2019 |
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Cadence Custom/AMS Flow Certified for Samsung 28nm FD-SOI Process Technology |
May. 13, 2019 |
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Cadence Delivers Smart JasperGold Formal Verification Platform |
May. 07, 2019 |
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Cadence Design Solutions Certified for TSMC-SoIC Advanced 3D Chip Stacking Technology |
Apr. 24, 2019 |
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Cadence Reports First Quarter 2019 Financial Results |
Apr. 23, 2019 |
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Cadence Collaborates with TSMC to Accelerate 5nm FinFET Innovation, Enabling Next-Generation SoC Production Design |
Apr. 22, 2019 |
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Cadence LPDDR4/4X Memory IP Subsystem Achieves ISO 26262 ASIL C Certification from SGS-TUV Saar Using TSMC 16FFC Process Technology |
Apr. 17, 2019 |
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Cadence Unveils Clarity 3D Solver, Delivering Unprecedented Performance and Capacity for System Analysis and Design |
Apr. 03, 2019 |
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Cadence Extends Cloud Leadership with New CloudBurst Platform for Hybrid Cloud Environments |
Apr. 01, 2019 |
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Cadence Digital Implementation and Parasitic Extraction Tools Enabled for Samsung Foundry Gate-All-Around Technology |
Apr. 01, 2019 |
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Cadence Collaborates with Northrop Grumman on Chip Design |
Mar. 28, 2019 |
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Cadence Announces Industry's First Verification IP for USB4 |
Mar. 14, 2019 |
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Cadence Announces Complete, Silicon-Proven LPDDR5 IP Solution |
Mar. 04, 2019 |
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Cadence Tensilica Product Development Process and Software Products Certified for ISO 26262 ASIL D Compliance for Automotive Applications |
Feb. 28, 2019 |
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New Cadence Tensilica ConnX B20 DSP Boosts Performance by Up to 10X for Automotive Radar/Lidar and Up to 30X for 5G Communications |
Feb. 26, 2019 |
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Cadence Drives Release of Alternative EVS Codec Implementation in 3GPP |
Feb. 25, 2019 |
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Cadence Tools and IP Optimized for New Arm Neoverse N1 Platform to Advance the Cloud-to-Edge Infrastructure Market |
Feb. 20, 2019 |
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Cadence Reports Fourth Quarter and Fiscal Year 2018 Financial Results |
Feb. 20, 2019 |
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Cadence and Green Hills Software Announce Strategic Partnership to Accelerate Embedded System Safety and Security |
Feb. 20, 2019 |
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Cadence Selected as Primary EDA Tool Vendor by GLOBALFOUNDRIES |
Feb. 15, 2019 |
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Vayyar Selects Cadence Tensilica Vision DSP for Advanced Millimeter Wave 3D Imaging Radar Solution |
Jan. 08, 2019 |
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Optek Selects Cadence Tensilica HiFi 3 DSP for Bluetooth 5.0 Dual-Mode Audio/Voice SoC |
Jan. 08, 2019 |
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Cadence Timing Signoff Tools Enable MaxLinear to Deliver Industry's First 400Gbps PAM4 SoC on 16FF Process |
Dec. 10, 2018 |
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Cadence Delivers Advanced Packaging Reference Flow for Samsung Foundry Customers |
Nov. 14, 2018 |
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Cadence Introduces the Tensilica HiFi 5 DSP, the First DSP Optimized for AI Speech and Audio Processing |
Oct. 31, 2018 |
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Cadence Custom/AMS Flow Certified on Samsung 7LPP Process Technology |
Oct. 24, 2018 |
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Cadence Reports Third Quarter 2018 Financial Results |
Oct. 23, 2018 |
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Cadence Accelerates Next-Generation Cloud Datacenter Infrastructure with Industry's First Silicon-Proven, Long-Reach 7nm 112G SerDes IP |
Oct. 22, 2018 |
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Cadence Accelerates Arm-Based Server Development by Automating Arm Pre-Silicon Bare Metal Compliance Testing |
Oct. 16, 2018 |
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Cadence Verification Suite Enabled on Arm-Based HPC Datacenters |
Oct. 16, 2018 |
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Cadence to Demonstrate System and Automotive Solutions at Arm TechCon 2018 |
Oct. 10, 2018 |
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Cadence Recognized with Four 2018 TSMC Partner of the Year Awards |
Oct. 10, 2018 |
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Cadence Expands its Cloud Portfolio with Delivery of TSMC OIP Virtual Design Environment |
Oct. 03, 2018 |
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Cadence Delivers Support for TSMC InFO_MS Advanced Packaging Technologies |
Oct. 02, 2018 |
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Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation |
Oct. 01, 2018 |
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Cadence Launches New Tensilica DNA 100 Processor IP Delivering Industry-Leading Performance and Power Efficiency for On-Device AI Applications |
Sep. 19, 2018 |
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Cadence Achieves Amazon Web Services Industrial Software Competency Status for Its Cloud-Hosted Design Solution |
Sep. 18, 2018 |
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Cadence Full-Flow Digital Tool Suite Achieves GLOBALFOUNDRIES 22FDX Certification |
Aug. 31, 2018 |
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Cadence Palladium Z1 Enterprise Emulation Platform Enables GUC to Accelerate SoC Design |
Aug. 14, 2018 |
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Cadence Selected for DARPA ERI Machine Learning Contract to Accelerate Electronic Design Innovation |
Jul. 24, 2018 |
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