SureFIT Custom SRAM Design Service
USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
AES-ECB-CBC-CFB-CTR-GCM 1 Billion Trace DPA Resistant Crypto Accelerator
I3C Slave APB
CEA and Siemens collaborate on research to expand applications of Digital Twin for industry
BrainChip Makes Second-Generation Akida Platform Available to Advance State of Edge AI Solutions
Semidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnect
The Challenge of Automotive Hardware Security Deployment
Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
Accelerating RISC-V development with network-on-chip IP
Formal verification best practices: towards end-to-end properties
Cadence Generative AI Solution: A Comprehensive Suite for Chip-to-System Design
Driving Connectivity and Communication Exploring the Synergy of CAN XL and Ethernet IP in Automotive Applications
© 2023 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.
Suppliers, list your IPs for free.