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IP / SOC Products News

• T2M announces availability of Bluetooth SIG qualified v5 Bluetooth Low Energy Controller, Stack and Profiles IP from Mindtree (Thursday Apr. 19, 2018)
  T2M announced the availability of Mindtree’s BQB (Bluetooth Qualification Body) qualified Bluetooth v5 Controller, Stack and Profiles (Declaration ID #D038059 and #D038060). This makes Mindtree the first company to qualify a full featured Bluetooth Low Energy 5 IP with TCRL 2 Specifications.
  
  
• Rambus Launches CryptoManager RISC-V Root of Trust Programmable Secure Processing Core (Monday Apr. 16, 2018)
  Rambus Inc. (NASDAQ: RMBS) today announced the availability of the CryptoManager Root of Trust, a fully programmable hardware security core built with a custom RISC-V CPU.
  
  
• DapTechnology Releases 1394/AS5643 IP for Microsemi IGLOO2 and SmartFusion2 FPGA Devices (Thursday Apr. 12, 2018)
  DapTechnology B.V. today announced the immediate availability of FireCore General Purpose Link (GPLink) for the Microsemi (now Microchip) IGLOO2 and SmartFusion2 FPGA devices.
  
  
• Cadence Boosts Vision and AI Performance with New Tensilica Vision Q6 DSP IP (Wednesday Apr. 11, 2018)
  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Cadence® Tensilica® Vision Q6 DSP, its latest DSP for embedded vision and AI built on a new, faster processor architecture. The fifth-generation Vision Q6 DSP offers 1.5X greater vision and AI performance than its predecessor, the Vision P6 DSP, and 1.25X better power efficiency at the Vision P6 DSP’s peak performance.
  
  
• Aldec's HES UltraScale+ Reconfigurable Accelerator and Northwest Logic's PCI Express Cores Provide Proven PCI Express Solution (Wednesday Apr. 11, 2018)
  Aldec, has used Aldec’s HES-XCVU9P-QDR UltraScale+ board with Northwest Logic’s Expresso 3.0 core for PCI Express® and AXI DMA Back-End Core to demonstrate a proven PCI Express solution which provides over 6 GB/s PCI Express throughput.
  
  
• CAST and Achronix Enable Processing from Data Center to the Edge with Lossless Compression IP (Tuesday Apr. 10, 2018)
  Achronix Semiconductor Corporation, a leader in field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA), announced its collaboration with CAST Incorporated, a semiconductor intellectual property company focusing on semiconductor IP for electronic system designers. CAST’s high performance lossless compression IP
  
  
• Partnering with Accelize, Nagase provides a Content-Oriented Find and Replace Accelerator Function on AccelStore for Cloud-based Data Analytics Acceleration (Tuesday Apr. 10, 2018)
  Unique search engine Axonerve™ search IP core developer NAGASE & CO., LTD. is publishing a text search and replace FPGA accelerator solution for cloud data analytics acceleration on the new AccelStore™ marketplace being announed today from partner, Accelize®.
  
  
• MediaTek Announces World's First Complete 56G PAM4 SerDes, Silicon-Proven on 7nm for ASIC services (Monday Apr. 09, 2018)
  Today MediaTek announced a new addition to its ASIC lineup with a 56G SerDes IP chip available with silicon-proven 7nm FinFET process technology. MediaTek's 56G SerDes is a high-performance DSP-based solution with PAM4 signaling.
  
  
• intoPIX to unveil newest JPEG-XS compression tech at NAB Show 2018 in Las Vegas - A World First (Monday Apr. 09, 2018)
  intoPIX, a leading provider of innovative compression technologies, will showcase a world first tech demonstration of the new ISO JPEG-XS standard at NAB Show in Las Vegas on booth C8526.
  
  
• CAST and Accelize Make GZIP Compression Instantly Available via Cloud-Based FPGA Accelerators (Monday Apr. 09, 2018)
  Semiconductor intellectual property provider CAST, Inc. has taken advantage of a new cloud-based FPGA accelerator marketplace developed by Accelize®to make industry-leading GZIP data compression available to users and developers whenever they need it.
  
  
• Flex Logix Validates EFLX 4K eFPGA IP Core on TSMC16FFC; Evaluation Boards Available Now (Monday Apr. 09, 2018)
  Flex Logix Technologies, Inc., the leading supplier of embedded FPGA (eFPGA) IP and software, today announced that the EFLX4K eFPGA IP core, both the Logic and DSP versions, have been fully validated on TSMC16FFC.
  
  
• PathPartner Technology unveils FPGA based HEVC & HEIF 4K Decoder on Amazon AWS EC2 Cloud (Monday Apr. 09, 2018)
  PathPartner, a Product R&D and Design Services firm, today announced the availability of FPGA based HEVC & HEIF 4K Decoder on Amazon Web Services (AWS) as FFMPEG plugin.
  
  
• Dolphin Integration augments the TSMC IP Ecosystem at 40 nm ULP eFlash with new TITAN Read Only Memory (Monday Apr. 09, 2018)
  Dolphin Integration augments TSMC’s IP ecosystem at 40 nm with TITAN, a breakthrough architecture for Read Only Memory compiler. This cost effective, single-layer and late programmable ROM compiler is capable of generating instance sizes from 512 bits to 1 Mbits.
  
  
• intoPIX demonstrates TICO implemented SMPTE 2110 IP running 4K live on FPGA CPU and GPU (Monday Apr. 09, 2018)
  intoPIX is presenting an exclusive demonstration of the TICO technology running on different CPU, GPU and FPGA platforms with the new SMPTE ST 2110 standards.
  
  
• IP-Maker to launch new NVMe host IP Family (Tuesday Apr. 03, 2018)
  IP-Maker is introducing a new product line of NVMe Host IPs. In addition to the Easy NVMe Host IP, targeting embedded applications and launched in 2017, today IP-Maker announces the availability of two new products targeting data center applications: the Advanced NVMe Host IP, and the Multi Root NVMe Host IP.
  
  
• Silex Inside releases a high throughput, scalable and performant MACsec engine (Friday Mar. 30, 2018)
  In current networking technologies, source authentication, data integrity and confidentiality are becoming more and more important. There exist numerous software implementations for security protocol suites on nearly all OSI layers, but these implementations are not well suited for timing-critical, high throughput applications.
  
  
• Mobile Semiconductor Introduces 40nm ULP Memory Compiler Support (Friday Mar. 30, 2018)
  Mobile Semiconductor today announced the introduction of its three new 40nm ULP memory compilers which are available immediately. The 40nm ULP compilers allow the engineer to create memory designs that maximize battery life while occupying the smallest amount of expensive silicon real estate.
  
  
• Mindtree announces BQB qualification of its Bluetooth Mesh v1.0 Software Stack and EtherMind Bluetooth v5.0 Software Stack & Profiles (Wednesday Mar. 28, 2018)
  Mindtree Ltd., has announced the BQB (Bluetooth Qualification Body) qualification of its Bluetooth Mesh v1.0 Software Stack along with its Bluetooth v5.0 Software Stack & Profiles.
  
  
• Rambus to Develop Hybrid Memory System Architectures for Future Data Centers (Monday Mar. 19, 2018)
  Rambus today announced a collaboration with IBM to research hybrid memory systems. Targeting one of the industry’s key performance challenges, Rambus Labs and IBM aim to optimize the use of DRAM and emerging memories to create a high-capacity memory subsystem that delivers comparable performance to DRAM alone.
  
  
• Eta Compute Launches Industry's First Neuromorphic Platform for Ultra-Low-Power Machine Intelligence at the Edge (Wednesday Mar. 14, 2018)
  Eta Compute today announced the availability of its latest System on Chip (SoC) platform. Silicon proven in TSMC 55nm ULP process, this ground-breaking product consumes only a fraction of the power of existing solutions and redefines the standard for ultra-low power embedded solutions.
  
  
• Mobile Semiconductor Introduces 28nm Memory Compiler Support (Wednesday Mar. 14, 2018)
  Mobile Semiconductor today announced the introduction of its new 28nm memory compilers available immediately. Mobile Semiconductor's silicon-proven embedded memory technology offers nine 28SLP GLOBALFOUNDRIES foundry sponsored compilers reaching all the way down to a 0.8V nominal power supply.
  
  
• Corigine adds certified USB IP to SiFive's Growing DesignShare Economy to Accelerate Adoption of RISC-V (Thursday Mar. 08, 2018)
  SiFive, the leading provider of commercial RISC-V processor IP, today announced the addition of Corigine, a fabless semiconductor and IP company, to the DesignShare economy.
  
  
• Synopsys Collaborates with Samsung Foundry to Develop DesignWare IP for Samsung 8-nm FinFET Process (Thursday Mar. 08, 2018)
  Synopsys today announced a collaboration with Samsung Foundry to develop DesignWare® Foundation IP for Samsung's 8-nanometer (nm) Low Power Plus (8LPP) FinFET process technology.
  
  
• Kneron Announces Low Power AI Processors NPU IP Series with the Lowest Power Consumption: Less Than 5mW (Thursday Mar. 08, 2018)
  Kneron, a leading provider of edge Artificial Intelligence (AI) solutions, today announced its AI processors Kneron NPU IP Series for edge devices.
  
  
• CEVA First to Deliver Bluetooth 5 Dual Mode IP (Wednesday Mar. 07, 2018)
  CEVA today reinforced its leadership in the Bluetooth IP market with delivery of its RivieraWaves Bluetooth 5 dual mode IP to multiple licensees, including ASR Microelectronics.
  
  
• Chipus to offer Ultra-Low-Power Analog IP Solutions for SilTerra's IoT Platform (Wednesday Mar. 07, 2018)
  Malaysian-based wafer foundry SilTerra Malaysia Sdn Bhd (Silterra) and Brazilian-based Chipus Microeletronica S.A. (Chipus) have jointly announced a partnership to provide analog IP solutions focusing on the Internet-of-Things (IoT) market for their mutual customers.
  
  
• Synopsys Adds New Algorithms in DesignWare Security Protocol Accelerators to Increase Protection for IoT SoCs (Tuesday Mar. 06, 2018)
  Synopsys today announced that it has added the ChaCha20 and Poly1305 (RFC7539) algorithms to its DesignWare® Multipurpose Security Protocol Accelerator IP, enabling designers to efficiently implement the latest encryption and authentication functionality to protect their IoT system-on-chips (SoCs).
  
  
• Arm delivers compelling visual experiences to the mainstream (Tuesday Mar. 06, 2018)
  Arm announces brand-new Mali Multimedia Suite of video, display, and graphics processors. The new suite of IP integrates seamlessly with existing DynamIQ-based CPUs and other Arm IP. Combination of DynamIQ CPUs and Mali-G51 deliver improved machine learning for existing applications such as face and fingerprint recognition
  
  
• Brite Semiconductor Releases Gen2 DDR LP PHY IP (Thursday Mar. 01, 2018)
  Brite Semiconductor today announced the availability of the second generation of DDR Low Power (LP) PHY IP based on SMIC 40LL process, with a 20% reduction in area, 37% in power consumption and 50% in physical implementation cycle, compared to the first generation.
  
  
• Northwest Logic's Expresso 4.0 Controller Core and Fidus Systems' Zynq UltraScale+ Platform demonstrates PCIe 4.0 Support (Tuesday Feb. 27, 2018)
  Northwest Logic and Fidus Systems announced today that Northwest Logic’s PCI Express® (PCIe®) 4.0 solution, which includes the Expresso 4.0 Core (PCI Express 4.0 controller) and a variety of full-featured PCI Express DMA cores, has been validated on the Fidus Sidewinder-100 platform.