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IP / SOC Products News

• Creonic to Offer End-to-end IP-over-Satellite Solutions (Thursday Jun. 10, 2021)
  Creonic today announced the launch of their new DVB-GSE Encapsulator and Decapsulator IP cores with immediate availability. Generic Stream Encapsulation (GSE) closes the gap between network protocols like IP or UDP and the physical layer of the DVB-S2/DVB-S2X standards.
  
  
• OPENEDGES and The Six Semi Announce Silicon Proven GDDR6 PHY in 12nm Process Technology (Wednesday Jun. 09, 2021)
  The Six Semiconductor Inc.(TSS), is pleased to announce the successful bring up of its 12nm GDDR6 PHY. TSS is wholly owned by OPENEDGES Technology, Inc. (OPENEDGES) and teamed up with OPENEDGES to integrate their advanced PHY technology together with OPENEDGES memory subsystem IP.
  
  
• Xylon Releases a Complete Multi-Channel HDR ISP IP Suite (Tuesday Jun. 08, 2021)
  The logicBRICKS HDR ISP IP Suite enables parallel processing of multiple Ultra HD video inputs in Xilinx programmable devices, ranging from the Artix-7 FPGAs to the latest Versal ACAP devices, while at the same time allowing for tremendous savings of up to 50 % of valuable programmable logic in comparison to simple instantiation of multiple ISP pipelines
  
  
• GUC Tapes Out AI/HPC/Networking Platform on TSMC CoWoS Technology Validating 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and 112G-LR SerDes IPs (Tuesday Jun. 08, 2021)
  Global Unichip Corp. (GUC), the Advanced ASIC Leader, announced today that it has successfully taped out AI/HPC/Networking CoWoS® Platform with 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and third-party 112G-LR SerDes IPs.
  
  
• Synopsys Expands Multi-Die Solution Leadership with Industry's Lowest Latency Die-to-Die Controller IP (Thursday Jun. 03, 2021)
  Synopsys, Inc. today announced its new DesignWare® Die-to-Die Controller IP, which complements the company's existing 112G USR/XSR PHY IP for a complete die-to-die IP solution. With the complete IP solution, designers benefit from a low-latency, high-bandwidth die-to-die connectivity offering that addresses the increased workload and faster data movement demands of high-performance computing, artificial intelligence (AI) and networking SoCs.
  
  
• Sondrel launches the fourth IP platform - SFA 350A - that delivers faster time to market for ADAS ASICs (Thursday Jun. 03, 2021)
  Bringing a new chip to the automotive market can be daunting due to the high safety standards required – ISO 26262. Sondrel has made this much easier for customers with the launch of its new, quad-channel, IP reference platform that has been architected with ISO26262 applications and the fast integration of customer IP in mind from the start.
  
  
• Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process (Thursday Jun. 03, 2021)
  Brite Semiconductor (“Brite”), a leading provider of custom ASIC design, manufacturing and IP, today announced the launch of ONFI (Open NAND Flash Interface) 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process.
  
  
• SmartDV Announces Support for ARINC Standards with Design and Verification IP (Thursday Jun. 03, 2021)
  SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today announced support of the ARINC standards with its Design and Verification IP.
  
  
• PLDA and AnalogX Announce Market-leading CXL 2.0 Solution featuring Ultra-low Latency and Power (Wednesday Jun. 02, 2021)
  PLDA and AnalogX today announced an optimized integration of PLDA CXL™ 2.0 controller and AnalogX 32G-MR PHY that reduces latency by 50% and power consumption by 40% compared to leading competitive solutions.
  
  
• PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform (Wednesday Jun. 02, 2021)
  PUFsecurity, a security solutions IP company, and Andes Technology (TWSE: 6533), a leading RISC-V CPU IP vendor, are the first to incorporate PUFsecurity’s PUFiot crypto coprocessor with Andes Technology’s D25F CPU and its associated platform AE350.
  
  
• EPI EPAC1.0 RISC-V Test Chip Taped-out (Tuesday Jun. 01, 2021)
  The European Processor Initiative (EPI), a project with 28 partners from 10 European countries, with the goal of helping the EU achieve independence in HPC chip technologies and HPC infrastructure, is proud to announce that we have successfully released our EPAC1.0 Test Chip for fabrication.
  
  
• Synopsys DesignWare PVT Subsystem Drives Performance, Power and Silicon Lifecycle Management on TSMC's N3 Process Technology (Thursday May. 27, 2021)
  Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of its DesignWare® process, voltage and temperature (PVT) monitoring and sensing subsystem IP on TSMC's industry-leading N3 process technology.
  
  
• Silex Insight launches high performance (2Tbps) SM4-GCM Multi-booster (Thursday May. 27, 2021)
  Silex Insight, a leading provider for flexible security IP cores, announces the launch of the SM4-GCM Multi-booster, a high performance, small size symmetric cryptographic core, compliant to Chinese National Standard GBT.32907-2016.
  
  
• DCD-SEMI accelerates AES security with the latest IP Core (Thursday May. 27, 2021)
  DAES IP Core is a cryptographic co-processor which implements Rijndael encryption algorithm compliant with FIPS 197 Advanced Encryption Standard. Its implementation in hardware brings significant benefits in fields of security and performance over software one.
  
  
• Precise-ITC launches 10G-1.6T Ethernet/FiberChannel/FlexO IP Core (Thursday May. 27, 2021)
  Precise-ITC launches the latest product — 10G-1.6T Ethernet/FiberChannel/FlexO IP Core. This is one of our Highly Integrated Multi-protocol IP solutions. It consists of multi-channel multi-rate PCS and MAC cores.
  
  
• AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features (Thursday May. 27, 2021)
  The 4th generation of aiWare™ automotive NPU hardware IP delivers up to 64 TOPS per core, leveraging innovative wavefront-processing algorithms and upgraded memory architecture to deliver dramatically improved PPA* and improved built-in ISO26262 safety support
  
  
• 5G Ethernet Subsystem to reduce development time is now available (Wednesday May. 26, 2021)
  Comcores ApS, a fast-growing specialized supplier of Intellectual Property (IP) Cores, today announced the availability of Ethernet Subsystem solution, a silicon agnostic and easy-to-use integration of 10G/25G Ethernet MAC and PCS for Time-Aware Applications.
  
  
• Arm Total Compute solutions bring performance, security and Armv9 to the broadest range of Client devices (Tuesday May. 25, 2021)
  Over the past 12 months digital experiences have never been more important, with our personal devices connecting us to family and friends, our home devices helping us stay entertained, and business devices giving us the opportunity to work anywhere, any time.
  
  
• PLDA Announces XpressRICH PCI Express 6.0 Controller IP for Next Generation SoC Designs (Tuesday May. 25, 2021)
  PLDA today announced the launch of their XpressRICH™ PCI Express® (PCIe®) Controller IP for the PCIe 6.0 specification. The PCIe 6.0 specification provides an evolutionary step forward by doubling the data rate to 64 GT/s link rate negotiation.
  
  
• Logic Fruit Technologies Launches ARINC 818 RTL IP Core for Avionics applications (Monday May. 24, 2021)
  Logic Fruit Technologies Pvt. Ltd, leading provider of IPs, Embedded Solutions, and product engineering services today announced the release of ARINC 818 IP Core.
  
  
• RISC-V Functional Safety Processor IP Core Introduced by CAST and Fraunhofer IPMS (Monday May. 24, 2021)
  CAST, Inc. today announced the immediate availability of EMSA5-FS, a fault-tolerant embedded RISC-V processor IP core designed to meet the most stringent functional safety requirements of automotive, airborne, and other safety-critical applications.
  
  
• GUC Announces GLink-3D Die-on-Die Interface IP using TSMC N5 and N6 Process for 3DFabric Advanced Packaging Technology (Monday May. 24, 2021)
  Global Unichip Corp. (GUC), the Advanced ASIC Leader, announces GLink-3D die-on-die interface IP using TSMC's N5 and N6 processes and 3DFabric™ advanced packaging technology for AI, HPC, and Networking applications.
  
  
• Cadence Accelerates Cloud Hyperscale Infrastructure with Third-Generation 112G-LR SerDes IP on TSMC's N5 Process (Monday May. 24, 2021)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMC’s N5 process for hyperscale ASICs, artificial intelligence/machine learning (AI/ML) accelerators, and switch fabric systems on chip (SoCs).
  
  
• Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process (Monday May. 24, 2021)
  
  
  
• Credo Announces 3.2Tbps XSR-Enabled High-Speed Connectivity Chiplet with 112Gbps Lane Rates (Thursday May. 20, 2021)
  Credo today announced the production availability of Nutcracker, the industry's first low-power 3.2Tbps retimer XSR-enabled high-speed connectivity chiplet with 112Gbps lane rates.
  
  
• LeapMind's "Efficiera" Ultra-low Power AI Inference Accelerator IP Was Verified RTL Design for ASIC/ASSP Conversion (Thursday May. 20, 2021)
  LeapMind Inc., a creator of the standard in edge AI (Shibuya-ku, Tokyo; CEO: Soichi Matsuda) today announced that company’s proprietary ultra-low power AI inference accelerator IP “Efficiera” was verified RTL design for ASIC/ASSP.
  
  
• Unisantis unveils Dynamic Flash Memory as DRAM alternative (Wednesday May. 19, 2021)
  nisantis® Electronics Singapore Pte. Ltd., today unveiled the company’s developments in Dynamic Flash Memory (DFM)® technology, a leap forward in the industry’s search for alternatives to DRAM for future low-cost high-density embedded or standalone memory applications.
  
  
• MoSys Announces Optimized P4 Pipeline Support for Stellar Packet Classification Platform IP for FPGAs (Tuesday May. 18, 2021)
  Today, MoSys announced that it will be adding support for optimized P4 (Programming Protocol-Independent Packet Processors) pipeline acceleration to its Stellar Packet Classification Platform IP family.
  
  
• Faraday Announces 16G Programmable SerDes in UMC 28HPC+ (Thursday May. 13, 2021)
  Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced its 16G Programmable SerDes is now available in the UMC 28nm HPC+ process.
  
  
• MIPI CSI 3, DSI 2 Tx & Rx Advanced Controller & PHY IP Cores available in major Fabs & Nodes for SOC Designs for Imaging and Display Applications (Wednesday May. 12, 2021)
  T2M-IP is pleased to announce the immediate availability of it’s partners advanced MIPI CSI, DSI Tx & Rx Controller & PHY IP Cores which are silicon proven and fully compliant with MIPI CSI v3.x Standard & MIPI DSI v2.x Standard integrated with matching MIPI D-PHYs & MIPI C-PHYs.