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IP / SOC Products News

• PCS Releases New 3GPP LTE Release 14-Compliant NB-IoT Transceiver IP Supporting High-Band and Low-Band Operation (Friday Dec. 14, 2018)
  Palma Ceia SemiDesign (PCS), a provider of next-generation wireless connectivity solutions, today announced a new transceiver IP supporting LTE NB-IoT Release 14. The transceiver IP is targeted for the Internet of Things (IoT) and Machine-to-Machine (M2M) applications.
  
  
• NSITEXE Develops Test Chip with Next-generation Semiconductor IP Core Called a DFP (Thursday Dec. 13, 2018)
  NSITEXE will unveil a test chip with a next-generation IP core (Data Flow Processor: DFP) that it is developing, as well as a test circuit board to be presented to potential customers and development partners.
  
  
• Minima Processor and NXP Join Forces to Deliver Ultra-Low-Power DSP Solutions (Wednesday Dec. 12, 2018)
  Minima Processor Oy today announced to partner with NXP Semiconductors N.V. (NASDAQ: NXPI) to deliver ultra-low-power digital signal processing (DSP) intellectual property (IP) solutions for a wide range of applications.
  
  
• Faraday Reveals Its Multi-protocol Video Interface IP on UMC 28HPC (Tuesday Dec. 11, 2018)
  Faraday Technology today announced the availability of its multi-protocol video interface IP on UMC 28nm HPC. The Multi-Protocol Video Interface IP solution supports both transmitter (TX) and receiver (RX) featuring a reduced silicon footprint ideal for state-of-the-art panel and sensor interfaces, projectors, MFP, DSC, surveillance, AR and VR, and AI applications.
  
  
• Brite Semiconductor, Naneng Microelectronics, and PLDA Collaborate to Release Complete PCIe 2.0/3.0 Solution (Monday Dec. 10, 2018)
  Brite Semiconductor (“Brite”), a world-leading ASIC design service and DDR controller/PHY IP provider headquartered in Shanghai, China, today announced their collaboration with Naneng Microelectronics and PLDA to deliver a complete PCIe 2.0/3.0 solution based on SMIC’s 40nm and 55nm process technology.
  
  
• Andes Custom Extension Further Accelerates Your High Performance RISC-V Processors (Thursday Dec. 06, 2018)
  Andes Technology today announced its newly-released AndeStar™ V5 CPU cores – N25/N25F, NX25/NX25F, A25 and AX25 – support the Andes Custom Extension™ (ACE) feature. The AndeStar™ V5 architecture is the result of RISC-V technology incorporated with Andes innovations based on rich experience in serving embedded processor IPs for over 10 years.
  
  
• CoreHW releases IP library with over 200 IP (Thursday Dec. 06, 2018)
  We are proud to release CoreHW IP library with over 200 silicon verified IP. Silicon proven solutions allow fast end-product development and implementation. The IP library gives a comprehensive look to our IP range and makes it easier and faster for you to start your ASIC design process.
  
  
• Zeno Demonstrates Scalability of World's Smallest SRAM Bitcell Technology to FinFET Technology Node at IEDM Conference (Thursday Dec. 06, 2018)
  Zeno Semiconductor demonstrated the scalability of its novel 1-transistor/2-transistor Bi-SRAM (bi-stable, intrinsic bipolar) memory technology to FinFET technology node at the IEDM Conference. The results from 14nm and 16nm FinFET technology nodes from multiple foundries follow previous implementation of Bi-SRAM technology in 28nm technology node.
  
  
• Achronix Announces Immediate Availability of Speedcore Gen4 eFPGA IP for AI/ML and Networking Hardware Acceleration Applications (Tuesday Dec. 04, 2018)
  Speedcore Gen4 increases performance 60%, reduces power by 50% and die area by 65% while retaining the original Speedcore eFPGA IP’s abilities to bring programmable hardware-acceleration capabilities to a broad range of compute, networking and storage systems for interface protocol bridging/switching, algorithmic acceleration and packet processing applications.
  
  
• Imagination announces PowerVR Series3NX Neural Network Accelerator, bringing multi-core scalability to the embedded AI market (Tuesday Dec. 04, 2018)
  Imagination Technologies announces PowerVR Series3NX, its latest neural network accelerator (NNA) architecture. Building on the success of its multi award-winning predecessor, Series3NX provides an unrivalled level of scalability, enabling SoC manufacturers to optimise compute power and performance across a range of embedded markets such as automotive, mobile, smart surveillance and IoT edge devices.
  
  
• Imagination reveals new PowerVR Series9 GPUs (Tuesday Dec. 04, 2018)
  Imagination Technologies announces PowerVR Series9XEP, Series9XMP, and Series9XTP. Representing PowerVR’s best-ever GPU line-up, these three new Series9 GPU families range from entry-level to high-end and incorporate efficiency improvements and new features to deliver outstanding performance.
  
  
• Brite Semiconductor, Naneng Microelectronics and Corigine Collaborate to Release Complete USB 3.0 IP Solution (Friday Nov. 30, 2018)
  Brite Semiconductor (“Brite”), a world-leading ASIC design service and DDR controller/PHY IP provider headquartered in Shanghai, China, today announced collaboration with Naneng Microelectronics and Corigine Electronic Technology Co. LTD (“Corigine”) to integrate the USB3.0 physical layer device (PHY) and controller, and implement in SMIC's 40nm and 55nm process technology, to deliver a complete USB3.0 IP solution.
  
  
• Perceptia Second-Generation Digital PLL IP Enters Mass Production (Thursday Nov. 29, 2018)
  Perceptia Devices, Inc., a developer of innovative PLL and timing technology, today announced that its flagship high-end second-generation digital PLL has entered mass production in UMC's 40LP foundry process. The IP, dubbed pPLL08-5G, targets a performance point not achieved in conventional analog PLL, or even a first-generation digital PLL.
  
  
• Allegro DVT Launches a new High-Performance, Multi-Format Video Encoder IP for 4K/UHD Video Resolutions and Beyond (Wednesday Nov. 28, 2018)
  Allegro DVT, a leading provider of video encoding and decoding semiconductor IP solutions, today announced the availability of AL-E200, a new generation of video encoder IPs built around a higher performance architecture and featuring many new optional smart encoding features.
  
  
• PLDA and Samtec Demonstrate PCIe 4.0 Communication over Twinax Cables Allowing Full 16GT/s PCIe 4.0 Bandwidth at Minimal Manufacturing Cost (Tuesday Nov. 27, 2018)
  The joint demonstration combines PLDA’s PCIe 4.0 IP solutions and Samtec interconnect to deliver PCIe 4.0 speed without the use of retimers or updated motherboard using MEGTRON 6 technologies, significantly reducing cost
  
  
• Zhuhai Chuangfeixin Introduces eNOR Embedded Flash Memory IP Solution and SPI NOR Flash Products on 65nm Floating-Gate Flash Process (Tuesday Nov. 27, 2018)
  Zhuhai Chuangfeixin Technology Co., Ltd. ("CFX"), a one-stop shop of memory IP and memory chip provider, announced the production release of embedded flash IP and stand-alone NOR flash products.
  
  
• Winbond and Tiempo Secure join forces to offer the world's first fully CC EAL5+ certifiable Secure Element IP for IoT (Thursday Nov. 22, 2018)
  Winbond Electronics Corporation and Tiempo Secure are announcing a complete solution for certifiable Secure Elements comprised of Tiempo Secure’s fully proven hard macro IP and Winbond’s certified secure flash. The combined solution offers cloud to IoT authentication and security, secured connectivity and IoT device privacy.
  
  
• TSN IP Core making devices fit for real-time Ethernet (Wednesday Nov. 21, 2018)
  Time-Sensitive Networking (TSN) is a set of standards allowing for the timed and prioritized transmission of real-time critical messages over standard Ethernet hardware. With the TSN IP Core, developers at Fraunhofer IPMS provide equipment manufacturers and operators the opportunity to make their devices fit for new TSN standards.
  
  
• Gear Radio Introduces Complete Bluetooth 5 Low-Power IP Solution for IoT SoC Applications (Wednesday Nov. 21, 2018)
  Gear Radio Electronics Corp., Asia’s leading RF IP design company, has announced the launch of its complete Bluetooth 5 low-power IP, which includes the link layer and the use of UMC’s 55nm ultra-low power embedded flash memory technology PHY.
  
  
• UMC and Gear Radio Introduce 55nm Bluetooth 5 IP Platform (Wednesday Nov. 21, 2018)
  United Microelectronics Corporation, a leading global semiconductor foundry, (“UMC”, Taiwan Stock Exchange: 2303) and Gear Radio Electronics Corporation, a wireless RF IC design and service company, today announced the availability of Bluetooth 5 dual-mode radio frequency (RF) IP on UMC’s 55nm process.
  
  
• Cadence Announces Tapeout of GDDR6 IP on Samsung's 7LPP Process, Enabling Complete GDDR6 IP Solution (Tuesday Nov. 20, 2018)
  Cadence today announced the tapeout of a complete GDDR6 memory IP solution on Samsung’s 7LPP process. GDDR6 memory is targeted at very high-bandwidth applications including machine learning, AI, cryptocurrency mining, graphics, automated driving, ADAS and high-performance computing (HPC).
  
  
• Blu Wireless Technology announces the HYDRA 2.X family of System IP for 802.11ay mmWave applications (Tuesday Nov. 20, 2018)
  Blu Wireless Technology announces the HYDRA 2.X family of 802.11ay System IP solutions, designed for wireless applications demanding fibre-level performance. The HYDRA 2.X family of System IP can be configured to reach throughputs ranging from 10Gbps to over 100Gbps and supports many of the new proposed features of the 802.11ay standard – including channel bonding and MIMO.
  
  
• Attopsemi's I-fuse OTP worked at 0.4V and 1uW read on GLOBALFOUNDRIES 22nm FD-SOI for Fraunhofer Institute for Photonic Microsystems' (IPMS) battery-less 61GHz RFID tags (Monday Nov. 19, 2018)
  Attopsemi's I-fuse™ OTP provides ultra-low read voltage/current, ultra-low program voltage/current, small size and wide temperature to enable GLOBALFOUNDRIES 22nm FD-SOI for Fraunhofer Institute for Photonic Microsystems’ (IPMS) 61GHz RFID tags in IoT applications.
  
  
• Attopsemi's I-fuse OTP Passed 250 degrees Celsius for 1,000hrs Wafer-level Burn-in Studies on GLOBALFOUNDRIES 22FDX FD-SOI Technology (Monday Nov. 19, 2018)
  Attopsemi Technology announced today that the company’s 256Kb OTP (One-Time Programmable) IP passed 250°C and 1,000 hours wafer-level burn-in studies. When programming I-fuse™ within the specifications, no defect was found in tens of millions I-fuses™ after several stress conditions. Moreover, the post-stressed I-fuse™ resistance has very minor changes.
  
  
• QuickLogic Announces eFPGA Now Available on TSMC 40nm Process (Thursday Nov. 15, 2018)
  QuickLogic today announced that its ultra-low power ArcticPro™ eFPGA technology is now available on the popular TSMC 40nm process node.
  
  
• Arasan completes its Total IP Solution for the UFS 3.0 Standard with immediate availability of its MIPI M-PHY 4.1 IP Core (Tuesday Nov. 13, 2018)
  Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automobile SoCs today announced the immediate availability of it’s M-PHY IP Compliant to MIPI M-PHY 4.1 Specifications supporting speeds of upto 11.6gpbs.
  
  
• Imagination reveals next step in PowerVR automotive strategy (Tuesday Nov. 13, 2018)
  Imagination Technologies announces PowerVR Automotive, a complete product package to enable growth and acceleration of the automotive semiconductor industry. Combining five essential elements – hardware IP, software, tools, documentation and long-term support – PowerVR Automotive enables existing customers and new entrants in the market to meet the safety standards and performance requirements of the industry as it moves towards fully autonomous driving.
  
  
• NSCore Inc. Addresses the IoT Market Need for an NVM IP Solution in Advanced Process Technology Nodes (Thursday Nov. 08, 2018)
  NSCore Inc. Addresses the IoT market need for an NVM IP Solution in advanced process nodes using Hi-k Metal Gate with their Multi-Time Programmable (MTP) Non-Volatile Memory (NVM) IP Solution
  
  
• Vidatronic Announces ACCUREF Series of Ultra-Precise, Extremely Low-Power Voltage and Current Reference IP Cores (Wednesday Nov. 07, 2018)
  Vidatronic announces the ACCUREF™ Series of voltage and current reference IP cores in the TSMC 130 nm process. The IP cores are optimized for low-power Application Specific Standard Circuit (ASSP), and power management integrated circuit (PMIC) integration.
  
  
• Silex Insight unveils high-throughput version of Chacha20-Poly1305 authenticated encryption (Monday Nov. 05, 2018)
  Silex Insight, leading provider of IP cores for secure computing, presents a new version of its Chacha20-Poly1305 hardware crypto engine that is geared towards high-throughput applications. The RFC7539-compliant IP core offers customers future-proof authenticated encryption between highly networked applications, for example in IoT or cloud computing.