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IP / SOC Products News

• SiFive Announces Differentiated Solutions for Generative AI and ML Applications Leading RISC-V into a New Era of High-Performance Innovation (Thursday Oct. 12, 2023)
  SiFive’s Performance P870 and Intelligence X390 product debut sets new bar for high-performance compute in consumer, infrastructure, and automotive applications
  
  
• BrainChip Makes Second-Generation Akida Platform Available to Advance State of Edge AI Solutions (Tuesday Oct. 03, 2023)
  BrainChip today announced the Early Access availability of its second-generation Akida™ IP solution for use in a wide range of applications across the Smart Home, Smart City, Industrial and Automotive markets.
  
  
• Semidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnect (Tuesday Oct. 03, 2023)
  There is an ever-increasing demand for more powerful chip designs for advanced applications, such as AI and ML, that require many cores on one chip. To facilitate this, Semidynamics and SignatureIP have partnered to integrate their respective IPs to provide a fully-tested RISC-V, multi-core environment and CHI interconnect for the development of state-of-the-art chip designs.
  
  
• M31 Announces Low-Power IP Solutions for TSMC's N12e Process (Thursday Sep. 28, 2023)
  M31 today announced that Jayanta, VP of Technical Marketing of M31 Technology, presented a speech on "Driving AIoT Innovation - M31 Low-Power IP" at the TSMC North America 2023 Open Innovation Platform® (OIP) Ecosystem Forum, showcasing M31's low-power silicon intelligence (IP) solution on TSMC's N12e process.
  
  
• Intrinsic ID Becomes World's First IP Vendor with PSA Certified Level 3 Root of Trust Component (Thursday Sep. 28, 2023)
  New solution from Intrinsic ID brings lab-validated security to connected devices in critical, high-performance Internet of Things (IoT) applications and enables compliance with US Cyber Trust Mark Program
  
  
• Synopsys and TSMC Streamline Multi-Die System Complexity with Unified Exploration-to-Signoff Platform and Proven UCIe IP on TSMC N3E Process (Wednesday Sep. 27, 2023)
  Comprehensive Multi-Die System Design Solution Supports 3Dblox 2.0 Standard and TSMC 3DFabric™ Technologies to Boost Productivity for Fast Heterogeneous Integration
  
  
• Chips&Media Announces the Release of "CMNP," the New Neural Processor IP (Wednesday Sep. 27, 2023)
  Chips&Media, Inc. today announced the release of "CMNP" (Chips&Media Neural Processor) for customers who want value-added image enhancement features in deep learning-based video processing.
  
  
• GlobalFoundries and Microchip Announce Microchip's 28nm SuperFlash® Embedded Flash Memory Solution in Production (Wednesday Sep. 27, 2023)
  GlobalFoundries (GF) (Nasdaq: GFS) and Microchip Technology (Nasdaq: MCHP), via its Silicon Storage Technology (SST) subsidiary, today announces the immediate release to production of the SST ESF3 third-generation embedded SuperFlash non-volatile memory (NVM) solution in the GF 28SLPe foundry process.
  
  
• Synopsys Unveils Industry's Broadest Portfolio of Automotive-Grade IP on TSMC's N5A Process Technology (Tuesday Sep. 26, 2023)
  Today Synopsys, Inc. (Nasdaq: SNPS) announced the industry's broadest portfolio of automotive-grade Interface and Foundation IP for TSMC's N5A process.
  
  
• QuickLogic Announces New eFPGA Contract Targeting GlobalFoundries™ 22FDX® Platform (Tuesday Sep. 26, 2023)
  QuickLogic today announced that it has been selected by a prominent technology company for an eFPGA IP targeting the GlobalFoundries™ (GF) 22FDX platform.
  
  
• Rambus MACsec-IP-361 is Certified ASIL-B Ready (Friday Sep. 22, 2023)
  We are pleased to announce that we have added another automotive-grade security IP solution to our portfolio. The Rambus MACsec-IP-361 has been certified ISO 26262 ASIL-B Ready by TÜV-SGS, making it an ideal solution to help our customers reduce development time and risk when designing a fully certified MACsec-capable SoC or ASIC.
  
  
• Cadence Advances Hyperscale SoC Design with Expanded IP Portfolio for TSMC N3E Process Featuring Next-Generation 224G-LR SerDes IP (Thursday Sep. 21, 2023)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced it has expanded its design IP portfolio on TSMC’s 3nm (N3E) process—most notably with the addition of the flagship Cadence® 224G Long-Reach (224G-LR) SerDes PHY IP, which has achieved first-pass silicon success.
  
  
• AiM Future Introduces Next-Generation NeuroMosAIc Processors, Expands Partnerships (Wednesday Sep. 20, 2023)
  AiM Future, the pioneer in concurrent multimodal inference accelerators for edge and end-point devices, announced a new family of NeuroMosAIc Processors delivering sixty percent higher performance efficiency over the previous generation.
  
  
• Creonic Expands Satellite IP Core Portfolio with DVB-S2X Multi-Carrier Demodulator (Tuesday Sep. 19, 2023)
  Creonic GmbH, a leading provider of IP cores for communication systems, proudly introduces its DVB-S2X Multi-Carrier Demodulator IP core.
  
  
• Synopsys Demonstrates Industry's First Interoperability of PCI Express 6.0 IP with Intel's PCIe 6.0 Test Chip (Monday Sep. 18, 2023)
  Synopsys, Inc. today announced that its collaboration with Intel has achieved end-to-end 64 GT/s interoperability between Synopsys’ IP for PCI Express (PCIe) 6.0 and Intel’s PCIe 6.0-enabled test chip.
  
  
• Quadric Announces Llama2 LLM Support Immediately Available for Chimera GPNPUs (Monday Sep. 18, 2023)
  Quadric® today announced that support for the Llama 2 large language model (LLM) is immediately available on its ChimeraTM general purpose neural processing unit (GPNPU) intellectual property (IP) core.
  
  
• Flex Logix Announces Reconfigurable Block RAM with ECC Option (Monday Sep. 18, 2023)
  Flex Logix® Technologies, Inc., the leading supplier of eFPGA IP, announced today the availability of Reconfigurable Block RAM with ECC and Parity Options.
  
  
• Cadence Accelerates On-Device and Edge AI Performance and Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design (Thursday Sep. 14, 2023)
  The new highly scalable Cadence® Neo™ Neural Processing Units (NPUs) deliver a wide range of AI performance in a low-energy footprint, bringing new levels of performance and efficiency to AI SoCs.
  
  
• Allegro DVT Launches a New Generation of High-Performance Multi-Format Video Encoder IP for 4K/8K Video Resolutions (Tuesday Sep. 12, 2023)
  Allegro DVT, a leading provider of video encoding semiconductor IP solutions, today announced the availability of its E300 series, a new generation of video encoder IPs built upon a higher performance architecture with support for resolutions from 4K60 up to 8K120.
  
  
• Tachyum Offers Its TPU Inference IP to Edge and Embedded Markets (Tuesday Sep. 12, 2023)
  Tachyum® today announced that it is expanding the unique value proposition of its Tachyum Prodigy by offering its Tachyum TPU® (Tachyum Processing Unit) intellectual property as a licensable core, allowing developers to take full advantage of intelligent, datacenter-trained AI when making IoT and Edge devices.
  
  
• CAST adds Ascon Lightweight Encryption Engine to Security IP Cores Line (Monday Sep. 11, 2023)
  The new ASCON-F Ascon Authenticated Encryption & Hashing Engine core provides a competitively small and fast hardware engine for the lightweight security functions detailed in the Ascon v1.2 specification. Its lean standard version supports Ascon-128 and -128a, the primary AEAD (authenticated encryption with associated data) cryptographic functions.
  
  
• NR-5G Polar Decoder and Encoder FEC IP Core Available For Licensing and Implementation from Global IP Core (Monday Sep. 11, 2023)
  The Forward Error Correction (FEC) sub-system is one of the essential basing blocks in any communication systems so a powerful FEC code is needed. The New Radio (NR) FEC for the control channel is proposed to be designed based on Polar codes allowing close to the Shannon limit/Capacity operation.
  
  
• Andes Announces General Availability of the New AndesCore™ RISC-V Multicore Vector Processor AX45MPV (Friday Sep. 08, 2023)
  The AX45MPV is the third generation of the award winning AndesCore™ vector processor series. Equipped with powerful RISC-V vector processing and parallel execution capability, it targets the applications with large volumes of data such as ADAS, AI inference and training, AR/VR, multimedia, robotics, and signal processing.
  
  
• Creonic Introduces NCR Processor IP Core for DVB-S2X/DVB-RCS2 Satellite Communication (Thursday Sep. 07, 2023)
  Creonic is proud to unveil its latest addition, the NCR Processor IP core. Designed to cater to the specialized needs of the satellite communication industry, this state-of-the-art IP core is set to facilitate clock synchronization and reference source solutions.
  
  
• Comcores now offers standalone Reed Solomon Forward Error Correction (RSFEC) IP cores (Thursday Sep. 07, 2023)
  Comcores has been developing high quality, first-time right IP cores and solutions for nearly a decade now and we understand that with increasing speed of data communication as well as volumes of data exchange, it is now even more critical to have data transmission that is error-free or error corrected, whether it is High-Speed PAM4 based Chip to Chip Protocol like Interlaken, JESD204D or Ethernet Protocols.
  
  
• CEVA Bluetooth® 5.4 IP Achieves SIG Qualification, Includes New Features to Address Rapidly Growing Electronic Shelf Label (ESL) Market (Wednesday Sep. 06, 2023)
  Ultra-low power RivieraWaves Bluetooth 5.4 IP platform qualified for all features, including Periodic Advertising with Response (PAwR) required for ESL tags
  
  
• GUC Announced 5nm HBM3 PHY and Controller Silicon Proven at 8.4 Gbps (Wednesday Sep. 06, 2023)
  Global Unichip Corp. (GUC), the advanced ASIC leader, announced that they have silicon proved 8.4 Gbps HBM3 solution on TSMC’s 5nm process technology. The platform was demonstrated at the Partner Pavilion of the TSMC 2023 North America Technology Symposium.
  
  
• Codasip collaborates with Siemens to deliver trace solution for custom processors (Tuesday Sep. 05, 2023)
  Codasip® now offers the Tessent™ Enhanced Trace Encoder solution from the Tessent Embedded Analytics product line at Siemens EDA with its customizable RISC-V cores. Through the joint solution, developers can efficiently trace and debug issues between silicon and software, and accurately understand real-time behaviors of even the most complex customized designs based on Codasip RISC-V processors™.
  
  
• Nextera-Adeas ST 2110 IP cores are now available on Intel FPGAs (Friday Sep. 01, 2023)
  We are proud to announce that our industry-leading ST 2110/ST 2059/IPMX FPGA IP cores and NMOS control software are now available on Intel FPGAs!
  
  
• Allegro DVT Fosters Adoption of MPEG-5 LCEVC Video Codec, Releases a Full Range of LCEVC Products (Thursday Aug. 31, 2023)
  Allegro DVT, a leading provider of Video codec compliance streams and silicon video IP solutions has launched a complete range of MPEG-5 LCEVC products comprising LCEVC compliance streams and LCEVC hardware decoder and encoder video IPs (D301 and E301).