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IP / SOC Products News

• Cadence Announces Complete, Silicon-Proven LPDDR5 IP Solution (Monday Mar. 04, 2019)
  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced early availability of the complete, silicon-proven Cadence® Denali® Gen2 IP for LPDDR5/4/4X in TSMC’s 7nm FinFET process technology.
  
  
• Synopsys' New Enhanced Security Package for ARC HS Processors Protects Embedded Systems Against Evolving Threats (Wednesday Feb. 27, 2019)
  Synopsys today announced the new Enhanced Security Package for Synopsys DesignWare® ARC® HS Processors, enabling designers to develop isolated, secure environments that help protect embedded systems and software from evolving threats in high-end automotive, storage, and gateway applications.
  
  
• New Cadence Tensilica ConnX B20 DSP Boosts Performance by Up to 10X for Automotive Radar/Lidar and Up to 30X for 5G Communications (Tuesday Feb. 26, 2019)
  Cadence today announced the Cadence® Tensilica® ConnX B20 DSP IP, the highest-performing DSP in the popular ConnX family. Based on a deeper processor pipeline architecture, the ConnX B20 DSP provides a faster and more power-efficient solution for the automotive and 5G communications markets, including next-generation radar, lidar, vehicle-to-everything (V2X), user equipment (UE)/infrastructure and IoT applications.
  
  
• CEVA Completes its First Test Trial of CEVA-Dragonfly NB2 NB-IoT Silicon at Vodafone Narrowband-IoT Open Lab (Tuesday Feb. 26, 2019)
  Using Vodafone’s open lab facilities which provide a realistic end-to-end live environment of the Narrowband-IoT technology, CEVA connected to the Vodafone NB-IoT network and demonstrated end-to-end IP connectivity with its CEVA-Dragonfly NB2 test chip running a 3GPP NB-IoT Rel.14 compliant software stack.
  
  
• Inside Secure launches Flexible Secure Provisioning to Easily Protect Connected Devices Secrets' During Manufacturing Process (Tuesday Feb. 26, 2019)
  Inside Secure today announced flexible provisioning solutions that eliminate the need to secure independent manufacturing sites, equipment, networks or employees – freeing manufacturers from costly and cumbersome physical security steps.
  
  
• Silvaco, Inc. and Avery Design Systems Partner to Deliver Complete CAN-FD Automotive and MIPI I3C IP and VIP Solutions (Tuesday Feb. 26, 2019)
  Avery Design Systems Inc., a leader in verification IP, today announced its partnership with Silvaco, Inc. for distribution of Avery’s MIPI I3C-Xactor VIP for sensor interfaces used in smartphones, IoT devices and camera systems, and CAN-FD/LIN/FlexRay Xactor VIP for automotive network applications.
  
  
• Synopsys and Palma Ceia SemiDesign Collaborate to Develop a Complete Hardware/Software NB-IoT IP Solution (Monday Feb. 25, 2019)
  Synopsys, Inc. and Palma Ceia SemiDesign (Palma Ceia) today announced that the two companies have integrated Palma Ceia's LTE Cat NB1/NB2 RF transceiver IP with Synopsys' DesignWare® ARC® EM9D Processor IP to deliver a complete low-power NB-IoT IP solution for both standalone or embedded modems.
  
  
• Tiempo Secure lowers entry barriers to securing the Internet of Things with its CC EAL5+ grade Secure Element IP macro dedicated to secure Systems-on-Chip (Monday Feb. 25, 2019)
  Tiempo Secure announces the availability of its CC EAL5+ grade Secure Element IP, allowing plug-and-play integration into Systems-on-Chip, supporting iUICC and other advanced security functions, thus providing the IoT solutions developers with the industry’s highest level of security.
  
  
• New SoC Security Platform Announced by CAST and Beyond Semiconductor (Monday Feb. 25, 2019)
  Semiconductor intellectual property (IP) provider CAST, Inc. and lead development partner Beyond Semiconductor today announced a new IP platform that helps design teams build System on Chip (SoC) designs that are secure from threats of all sorts.
  
  
• Racyics extends its Silicon Proven ABB IP Portfolio (Monday Feb. 25, 2019)
  Clock generation is an essential part of every SoC. That’s why Racyics extends its silicon proven, fully Adaptive Body Bias enabled IP offering by adding an Ultra-Low-Voltage fast lock-in ADPLL and a 10 MHz, 5µW Ultra-Low-Power ADFLL Clock generator
  
  
• Arasan announces the immediate availability of its MIPI D-PHY / C-PHY Combo IP for TSMC 22nm SoC Designs (Friday Feb. 22, 2019)
  Arasan Chip Systems announces the immediate availability its MIPI D-PHY / C-PHY Combo IP supporting speeds of upto 2.5 gpbs for TSMC 22nm SoC designs. The MIPI D-PHY / C-PHY Combo IP is seamlessly integrated with Arasan own CSI Tx, CSI Rx, DSI Tx and DSI Rx as part of its Total MIPI Imaging and Display IP Solution.
  
  
• UltraSoC announces support for Western Digital RISC-V SweRV Core and OmniXtend cache-coherent interconnect (Thursday Feb. 21, 2019)
  UltraSoC, the leading provider of embedded analytics for the RISC-V ecosystem, today announced full support within its embedded analytics architecture for Western Digital’s RISC-V SweRV Core™ and associated OmniXtend™ cache-coherent interconnect.
  
  
• Synopsys and GLOBALFOUNDRIES Collaborate to Develop Industry's First Automotive Grade 1 IP for 22FDX Process (Thursday Feb. 21, 2019)
  Synopsys, Inc. (Nasdaq: SNPS) and GLOBALFOUNDRIES (GF) today announced a collaboration to develop a portfolio of automotive Grade 1 temperature (-40ºC to +150ºC junction) DesignWare® Foundation, Analog, and Interface IP for the GF 22-nanometer (nm) Fully-Depleted Silicon-On-Insulator (22FDX®) process.
  
  
• Rambus and GLOBALFOUNDRIES to Deliver High-Speed SerDes on 22FDX for Communications and 5G Applications (Thursday Feb. 21, 2019)
  Rambus today announced the availability of 32G Multi-protocol SerDes PHY on GLOBALFOUNDRIES 22nm FD-SOI (22FDX®) platform for high-volume, high-performance applications.
  
  
• CEA-Leti & Stanford Target Edge-AI Apps with Breakthrough NVM Memory Cell (Wednesday Feb. 20, 2019)
  Paper at ISSCC 2019 Presents Proof-of-Concept Multi-Bit Chip That Overcomes NVM’s Read/Write, Latency and Integration Challenges
  
  
• GLOBALFOUNDRIES and Dolphin Integration to Deliver Differentiated FD-SOI Adaptive Body Bias Solutions for 5G, IoT and Automotive Applications (Tuesday Feb. 19, 2019)
  GLOBALFOUNDRIES (GF) and Dolphin Integration, a leading provider of semiconductor IP, today announced a collaboration to develop a series of adaptive body bias (ABB) solutions to improve the energy efficiency and reliability of system-on-chip (SoC) on GF’s 22nm FD-SOI (22FDX®) process technology for a wide range of high-growth applications such as 5G, IoT and automotive.
  
  
• Chips&Media paving new road towards 8K with launch of Dual-CORE HEVC+H.264 combined codec IP (Monday Feb. 18, 2019)
  Chips&Media, a leading video technology provider, announced WAVE541C, Dual-CORE HEVC+H.264 combined codec IP optimally architected for 8K resolution video based on WAVE521C.
  
  
• Palma Ceia SemiDesign Announces Silicon-Proven Dual Band LTE NB-IoT Transceiver for IoT Applications (Monday Feb. 18, 2019)
  Palma Ceia SemiDesign (PCS), a provider of next-generation wireless connectivity solutions, today announced a silicon-proven LTE NB-IoT transceiver for the Internet of Things (IoT) and Machine-to-Machine (M2M) applications.
  
  
• UltraSoC extends on-chip analytics architecture for the age of machine learning, artificial intelligence and parallel computing (Friday Feb. 15, 2019)
  Developers in the automotive, storage and high performance computing industries can now integrate even more sophisticated hardware-based security, safety and performance tuning capabilities within their products, as well as reaping substantial time-to-market and cost benefits of using UltraSoC in the system on chip (SoC) development cycle.
  
  
• Next-generation Armv8.1-M architecture: Delivering enhanced machine learning and signal processing for the smallest embedded devices (Thursday Feb. 14, 2019)
  We’re introducing Arm Helium technology, the M-Profile Vector Extension (MVE) for the Arm Cortex-M series processors that will enhance the compute performance of the Armv8.1-M architecture on the secure foundation of Arm TrustZone.
  
  
• Andes Technology Corp. Targets Deeply Embedded Protocol Processing and Entry-level MCUs With the New N22, the Smallest RISC-V Core in its V5 Family (Tuesday Feb. 12, 2019)
  Andes Technology announces the new N22 32-bit RISC-V CPU core to target deeply embedded protocol processing such as high-speed communication and storage, and entry-level MCU applications such as small IoT and wearable devices.
  
  
• SoC-e networking IP porfolio extends with SpaceWire: The standard for Spacecraft communication networks (Friday Feb. 08, 2019)
  SoCe has released a SpaceWire IP Core is a VHDL core that implements a complete, reliable and fast SpaceWire encoder-decoder with AXI management interface, synthesizable for FPGA and for reconfigurable SoC Devices.
  
  
• Sital Technology Announces the World's First Secured 1553 Component (Wednesday Feb. 06, 2019)
  Sital Technology announces the availability of a Secured MIL-STD-1553B/1760 solution. The secured 1553 capabilities provide real-time detection and prevention against zero-day cyber-attacks.
  
  
• Logic Design Solutions Introduces the first member of NVMe HOST RECORDER IPs (Wednesday Feb. 06, 2019)
  The NVME-HOST-RECORDER-ITX-Z7 IP completes an existing family of SATA RECORDER IP of Logic Design Solutions (LDS) in order to provide a complete panoply in embedded recording domain.
  
  
• Xilinx Introduces HDMI 2.1 IP Subsystem (Tuesday Feb. 05, 2019)
  Xilinx today announced that it has introduced a complete HDMI™ 2.1 IP subsystem to its portfolio of intellectual property cores, enabling Xilinx® devices to transmit, receive and process up to 8K (7680 x 4320 pixels) ultra-high-definition (UHD) video in pro AV equipment
  
  
• Mobile Semiconductor Introduces A New 55nm High Density Memory Compiler Especially Designed For IoT Devices (Monday Feb. 04, 2019)
  Mobile Semiconductor announced a new 55nm HD (High Density) memory compiler targeted at the cost sensitive IoT market. The new memory compiler boasts one of the highest density footprints in the industry dramatically reducing the die area and reducing customer product costs for sensors, smart locks, trackers and smart light bulbs.
  
  
• intoPIX and Macnica Preview a 4K AV over 1GbE Module Powered by TICO-XS and ST 2110 IP Transport for Pro AV Market at ISE 2019 (Monday Feb. 04, 2019)
  intoPIX SA, a leading provider of innovative image processing technologies for professional media applications, announced today that it is demonstrating TICO-XS on Macnica’s 4K AV over 1GbE module at ISE 2019.
  
  
• Hardent and Xilinx Collaborate to Deliver Complete 8K Ready DisplayPort 1.4 IP Subsystem (Thursday Jan. 31, 2019)
  Hardent, a leading provider of video compression IP cores and Certified member of the Xilinx Alliance Program, today announced the launch of a new DisplayPort™ 1.4 IP subsystem solution developed in collaboration with Xilinx.
  
  
• Rambus Announces Tapeout of GDDR6 Memory PHY on TSMC 7nm Process Technology (Wednesday Jan. 30, 2019)
  Rambus Inc. today announced the tapeout of its GDDR6 PHY on TSMC 7nm FinFET process technology and is available from Rambus for licensing today.
  
  
• Mobile Semiconductor Introduces a 22nm FDX (FDSOI) ULP Memory Compiler with Market Leading Features (Thursday Dec. 20, 2018)
  Mobile Semiconductor announced their new 22nm FDX ULP (Ultra Low Power) Memory Compiler complete with a comprehensive set of features that cement their leadership position in FDX Memory Compiler offerings.