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IP / SOC Products News

• Moortec announce their Embedded In-Chip Monitoring Subsystem on TSMC 7FF (Wednesday Aug. 23, 2017)
  Moortec Semiconductor, specialists in embedded in-chip sensing, are pleased to announce the availability of their easy to integrate, embedded monitoring subsystem on TSMC’s 7nm FinFET (FF) process.
  
  
• Pinnacle Imaging Systems Launches Denali-MC HDR Image Signal Processor IP Core (Monday Aug. 21, 2017)
  Today, Pinnacle Imaging SystemsTM, announced the launch of its proprietary, Denali-MCTM camera-ready HDR Image Signal Processor (ISP) IP core. This next generation HDR video capture technology relies on Pinnacle Imaging’s advanced algorithms to accurately tone map high contrast scenes while minimizing HDR motion artifacts.
  
  
• Codasip Announces Latest RISC-V Processor (Monday Aug. 21, 2017)
  Codasip today announced the newest addition to their Berkelium (Bk) family of RISC-V processors. The Codasip Bk-1 processor is an FSM processor targeted at the Internet of Things (IoT) by offering ultra-low power, the lowest cost of all comparable embedded processors, and optimal performance/power efficiency.
  
  
• PLDA Announces vDMA, a Highly Efficient Many-Channel DMA Engine Engineered for Virtualized Systems in Data Centers, to be demonstrated at Flash Memory Summit 2017 (Monday Aug. 07, 2017)
  PLDA, the industry leader in PCI Express® interface IP solutions, today announced their vDMA™ IP Core, a highly efficient many-channel DMA engine specifically engineered for SoCs that power tomorrow’s virtualized data centers.
  
  
• Palma Ceia Announces Complete PHY Solution for HaLow 802.11ah, Supporting IoT WiFi Connectivity (Friday Aug. 04, 2017)
  Palma Ceia SemiDesign (PCS), a provider of next-generation wireless connectivity solutions, announced today it will be adding a complete baseband solution to its HaLow 802.11ah transceiver offering, providing a complete PHY (Physical Layer) and protocol stack solution for WiFi Internet of Things (IoT) connectivity.
  
  
• Mobiveil Announces FPGA-Based SSD Platform for 3D NAND Flash Devices, Upgrades NVMe, PCI Express Controllers to Support Latest Specifications (Friday Aug. 04, 2017)
  Mobiveil today announced immediate availability of its Field Programmable Gate Array (FPGA)-based solid state drive (SSD) development platform targeting the latest 3D NAND devices.
  
  
• Synopsys Interface IP Portfolio on 16-nm FinFET Process Meets Stringent Automotive AEC-Q100 Grade 1 Temperature Requirements (Tuesday Aug. 01, 2017)
  Synopsys, Inc. (Nasdaq: SNPS) today announced that its 16-nm FinFET DesignWare® Interface IP for LPDDR4 multiPHY, MIPI D-PHY and Multi-Protocol 10G PHY supporting PCI Express 3.1 and Ethernet have met the AEC-Q100 Grade 1 temperature requirements.
  
  
• eMemory Announces Validation of On-Chip Security IP on UMC Advanced Nodes (Thursday Jul. 27, 2017)
  eMemory announced today that it has verified its latest on-chip security IP on several of UMC’s advanced nodes. The IP, based on unique IC biometrics, can enable a wide range of in-field security applications and be tailored for hardware protection within IoT and data centers.
  
  
• Cadence Announces Tensilica HiFi 3z DSP Architecture for Latest Mobile and Home Entertainment Applications (Tuesday Jul. 25, 2017)
  Cadence today announced the Cadence® Tensilica® HiFi 3z DSP IP core for system-on-chip (SoC) designs targeted for the latest mobile and home entertainment applications, including smartphones, augmented reality (AR)/3D goggles, digital TVs and set-top boxes (STBs).
  
  
• Synopsys Launches Complete HBM2 IP Solution Offering More Than 300 GB/s Bandwidth for Graphics and High-Performance Computing SoCs (Tuesday Jul. 25, 2017)
  Synopsys today introduced its complete DesignWare® High Bandwidth Memory 2 (HBM2) IP solution consisting of controller, PHY and verification IP, enabling designers to achieve up to 307 GB/s aggregate bandwidth, which is 12 times the bandwidth of a DDR4 interface operating at 3200 Mb/s data rate.
  
  
• Inside Secure announces new high-performance 400G MAC layer security (MACsec) IP for Datacenters and the Cloud (Monday Jul. 24, 2017)
  Inside Secure (Euronext Paris: INSD), at the heart of security solutions for mobile and connected devices, has released its newest MACsec IP cores that successfully tackle two major challenges in securing high-speed networking: power consumption and flexible line rate throughput in an optimal die area. Leading chipmakers today are already realizing the benefits of Inside Secure’s 400G MACsec IP in their devices (400 Gigabit/sec).
  
  
• Flex Logix's EFLX Embedded FPGA Accelerates Processor Performance By 40-100X (Friday Jul. 21, 2017)
  Flex Logix® Technologies, Inc., the leading supplier of embedded FPGA IP and software, today released an application note highlighting the power of its EFLX® embedded FPGA as a reconfigurable accelerator.
  
  
• Microsemi and Tamba Collaborate on New PolarFire Devices to Deliver Industry-Leading Low Power FPGA-Based 10G Ethernet Solution (Tuesday Jul. 18, 2017)
  Microsemi and Tamba Networks today announced their collaboration to incorporate Tamba Networks' Ethernet media access controller (MAC) in Microsemi's new cost-optimized, low power, mid-range PolarFire™ field programmable gate array (FPGA) to offer industry-leading low power FPGA-based 10G Ethernet solution.
  
  
• Dolphin Integration sets up a large range of sponsored IPs at 55 nm to reduce SoC power consumption by up to 70% (Monday Jul. 17, 2017)
  Dolphin Integration provides its customers with a complete set of Foundation IPs in TSMC 55 nm uLP and uLP eFlash processes; these are specifically designed to help reduce the SoC power consumption during sleep and active modes.
  
  
• GLOBALFOUNDRIES and VeriSilicon To Enable Single-Chip Solution for Next-Gen IoT Networks (Friday Jul. 14, 2017)
  GLOBALFOUNDRIES and VeriSilicon today announced a collaboration to deliver the industry’s first single-chip IoT solution for next-generation Low Power Wide Area (LPWA) networks.
  
  
• Chuang Fei Xin Anti-Fuse One Time Programming Solution Qualified In Silterra High Voltage Technology (Friday Jul. 14, 2017)
  SilTerra Malaysia Sdn. Bhd., a Malaysian home grown leading semiconductor wafer foundry, and Zhuhai Chuangfeixin Technology Co., Ltd. ("CFX"), an memory IP design house, jointly announced the production release of Anti-Fuse One-Time-Programming (OTP) IP in SilTerra’s 160nm and 110nm High Voltage technology.
  
  
• Faraday Unveils 28HPC USB 3.1 PHY and 40LP Type-C PHY with PD Controller (Thursday Jul. 13, 2017)
  Faraday Technology today announced that the availability of its USB 3.1 PHY on UMC 28HPC process, as well as the silicon-verified USB 3.1 Type-C PHY with USB-PD 2.0 support on UMC 40LP process.
  
  
• Arasan Announces IP solutions for the Next Generation of Mobile Storage - UFS 3.0 (Wednesday Jul. 12, 2017)
  Arasan extends its long history of support for JEDEC and MIPI standards with the availability of UFS 3.0 controller IP, supporting a maximum throughput of 11.6 Gbps with M-PHY HS-Gear 4 2-lane operation, providing the highest data transfer rate with low power consumption for advanced mobile applications such as smartphone and tablets.
  
  
• The fastest C-Compiler for i251 from Dolphin Integration is now available with our free discovery license! (Monday Jul. 10, 2017)
  Dolphin Integration blows a fresh air in the i251 software ecosystem with SmartVision™ IDE, now imbedding a C-compiler using the leading-edge technologies from LLVM / Clang.
  
  
• IP-Maker NVMe IP, ready for persistent memories (Monday Jul. 10, 2017)
  IP-Maker, the leading storage IP startup, will exhibit at Flash Memory Summit in Santa Clara, CA, on August 8 to 10. The next generation of non-volatile memories comes with an access time in the microsecond range.
  
  
• eVaderis Joins FDXcelerator Program to Deliver Memory IP to GLOBALFOUNDRIES 22FDX Technology Platform (Monday Jul. 03, 2017)
  eVaderis today announced that it has joined GLOBALFOUNDRIES' FDXcelerator™ Partner Program to provide scalable, advanced memory IP to be compatible with GF's 22FDX® technology. The advanced memory IP is expected to offer performance and energy saving advantages over competing memory solutions.
  
  
• VeriSilicon Unveils Vivante 2 Teraflop "MESH" Architecture Compute IP Cores for Embedded Devices (Wednesday Jun. 28, 2017)
  VeriSilicon today announces Vivante CC8000, a dedicated IP series based on highly parallel, scalable MESH (Memory Efficient Shader) processor architecture with the highest GFLOPs per square millimeter silicon for embedded applications like scientific computing, cryptography, advanced signal processing, machine vision, natural language processing and more.
  
  
• ICE-P3 EPU Integrates Temperature-Compensated Voltage And Frequency Control For Maximum Energy Savings (Monday Jun. 26, 2017)
  Sonics today introduced ICE-P3™, the IP industry's first product to automate implementation of dynamic voltage and frequency scaling (DVFS). ICE-P3 is the newest member of the ICE-Grain™ Family of Energy Processing Units (EPU) that identifies, sequences, and controls power state transitions in hardware up to 500X faster than conventional software-based approaches.
  
  
• Synopsys Embedded Vision Processor IP Quadruples Neural Network Performance for Machine Learning Applications (Monday Jun. 26, 2017)
  Synopsys today announced that it has enhanced the convolutional neural network (CNN) engine in its DesignWare® EV6x Vision Processors to address the increasing video resolution and frame rate requirements of high-performance embedded vision applications.
  
  
• Arastu Systems announces LPDDR3/4 Single Controller for optimal performance (Thursday Jun. 22, 2017)
  High-end computing applications requires Higher Performance keeping the Power and Latency intact. Arastu Systems, a product engineering services company, today announced the immediate availability of LPDDR3/4 DRAM Memory Controller Core. The IP is highly configurable and delivers performance up to 4266 MT/s.
  
  
• Synopsys and GLOBALFOUNDRIES Collaborate to Deliver Design Platform and IP Enablement for 7-nm FinFET Process (Tuesday Jun. 20, 2017)
  Synopsys, Inc. today announced the enablement of the Synopsys Design Platform and DesignWare® Embedded Memory IP on GLOBALFOUNDRIES 7-nm Leading-Performance (7LP) FinFET process technology.
  
  
• Menta Offers Validation Board for Embedded FPGA Supporting TSMC's 28nm HPC+ Process (Tuesday Jun. 20, 2017)
  Menta today announced a validation board supporting TSMC’s 28-nanometer High Performance Compact Plus (28HPC+) process. The board includes a test chip with an embedded FPGA (eFPGA) IP core from Menta, and is supplied with all of the hardware and software required for validation of the complete eFPGA design flow from RTL to bitstream, and through final hardware test and measurement.
  
  
• UltraSoC announces industry's first processor trace support for RISC-V (Monday Jun. 19, 2017)
  UltraSoC, the leading developer of embedded analytics technology, today announced that it has developed processor trace support for products based on the open source RISC-V architecture.
  
  
• Sankalp Semiconductor Announces Availability of 16nm IO Libraries (Monday Jun. 19, 2017)
  Sankalp Semiconductor a design service company offering comprehensive mixed signal and SoC solutions today announced the availability of its 16nm IO library.
  
  
• GUC Successfully Rolls out HBM2 Total Solution (Monday Jun. 19, 2017)
  Global Unichip has successful taped out a 16nm, second-generation High Bandwidth Memory (HBM) PHY and controller with verified interposer design and CoWoS Package. The innovative ultra-high capacity memory ASIC solution will meet the demanding requirements of artificial intelligence (AI), deep learning (DL), and a variety of high performance computing (HPC) applications.