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0.11um high density Dual-Port SRAM compiler
0.11um high density Dual-Port SRAM compiler
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Memories IP
- 3GPP LTE 3GPP2 1xEV-DO Turbo Decoder with Ping Pong Input and Output Memories
- Silicon-proven, High Density and Low Power Static Random Access Memories
- Block Memory Generator
- 55LL Ultra-High Speed SRAM instances with SVT bit cell.
- SMIC 130nm LL process ROM compiler.
- SMIC 0.13um high density Dual-Port SRAM compiler