1.2GHz Programmable PLL
This PLL is an integer N PLL, giving the best jitter performance, with a flexible large range of programmable input, frequency and output dividers.
The PLL is designed to provide excellent jitter performance while also maintaining low current consumption by using a third order loop filter which gives the best spurious performance, supply rejection, phase noise and jitter performance.
The PLL has been implemented in a standard 90nm basic logic process with no analog options. It is readily portable to any similar manufacturing process, and any activity of this nature is fully supported.
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Block Diagram of the 1.2GHz Programmable PLL IP Core
