This customizable PLL has been designed for use with high performance A/D converters such as S3’s 10-bit 80MSPS pipeline ADC, where low jitter clock generation is critical to the success of applications such as DVB and Cable Modem.
This PLL is an integer N PLL, giving the best jitter performance, with a flexible large range of programmable input, frequency and output dividers.
The PLL is designed to provide excellent jitter performance while also maintaining low current consumption by using a third order loop filter which gives the best spurious performance, supply rejection, phase noise and jitter performance.
The PLL has been implemented in a standard 90nm basic logic process with no analog options. It is readily portable to any similar manufacturing process, and any activity of this nature is fully supported.