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Secure Boot SDK based on NIST CAVP validated cryptographic algorithms and standards
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10-bit 160 MSPS Current Steering DAC
Features
- 0.13µm 6 Metal CMOS (No analog options)
- 3.3V and 1.2V power supplies required
- 160 MSPS output update rate
- Typical SFDR of 60dBc
- INL and DNL < 1 LSB
- Power Dissipation
- 25mW for 100W termination
- Standby and power down modes
- Core area of 0.13mm2
- Total area of 0.18 mm2 (including reference)
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