10-bit 160 MSPS Current Steering DAC

Features

• 0.13µm 6 Metal CMOS (No analog options)
• 3.3V and 1.2V power supplies required
• 160 MSPS output update rate
• Typical SFDR of 60dBc
• INL and DNL < 1 LSB
• Power Dissipation
• 25mW for 100W termination
• Standby and power down modes
• Core area of 0.13mm2
• Total area of 0.18 mm2 (including reference)

Benefits

• The dynamic performance can be maintained for frequencies close to the DAC Nyquist frequency.
• The total area of the DAC including bandgap reference is 0.19mm2
• Developed on standard 0.13µm logic process, the DAC is ideal for integration with a DSP engine. The DAC can be ported to any similar process.
• Lower power consumption can be achieved by increasing the reference resistor size.
• The output voltage range can be set by selecting suitable load resistor or external bias resistor values. A differential output voltage swing of up to 2V peak to peak is possible.

Deliverables

• As part of the License Agreement the components listed will be delivered:
• Datasheet
• Characterization Report
• Flat Netlist (cdl)
• Layout View (gds2)
• Abstract View (lef)
• Timing View (tlf)
• Behavioral Model (VHDL/Verilog)
• Silicon Samples
• DemonstrationEvaluation Board
• Integration Support
• For more detailed information regarding the S3DA160M10BC13 D/A converter please refer to the full datasheet which is available upon request. The S3DA160M10BC13 can be delivered as a single IP component for customer integration or S3 engineers can integrate it as part of a SoC engagement.

• see the entire 10-bit 160 MSPS Current Steering DAC datasheet
• get in contact with 10-bit 160 MSPS Current Steering DAC Supplier