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10-Bit 240MS/s Triple DAC in TSMC 65nm
The S3TD240M10BT65LPA is a triple-DAC designed to be loaded by double terminated 75 Ohm Lines.
The Triple-DAC segmentation results in an excellent static performance and reduced glitch energy at the output. This also ensures parasitics within the DAC are minimized. Furthermore, the distortion at the output is greatly reduced by using propriety latch architecture.
The Triple-DAC segmentation results in an excellent static performance and reduced glitch energy at the output. This also ensures parasitics within the DAC are minimized. Furthermore, the distortion at the output is greatly reduced by using propriety latch architecture.
Features
- 65nm TSMC Logic LP Process, 7 Metals Used
- 2.5V and 1.2V Supplies
- Sampling Rate up to 240MS/s
- 6-bit Gain Control
- Single-Ended or Differential Output Range
- Full scale output currents 17mA to 34mA
- DNL< ±1LSB Typ.; INL< ±2LSB Typ.
- Max Output Swing 1.3V Single-ended
Benefits
- No Analog Options
- Triple Channel DAC easily configurable as single VDAC
- Sense comparator in each channel
- Low Power Consumption
- Stand-By and Power-Down Modes
- Small Die Area
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