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10-Bit 64MHz 1.2V 1.9mW delta-sigma ADC, CMOS 130nm
The nSAD_ST130M_1V2_AD10b64M is a 64MS/s, 9.9 ENOB, power efficient Sigma Delta ADC designed on the ST 130 M technology. Built around a fully-differential 3rd-order single-bit low-pass modulator, it consumes 1.9mW on silicon, reaching an energy efficiency of 31fJ/conversion-step.
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Block Diagram of the 10-Bit 64MHz 1.2V 1.9mW delta-sigma ADC, CMOS 130nm
10-Bit Delta-Sigma ADC in 130nm IP
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- The CODEC integrates: 2-channel 24-bit sigma-delta ADC, 2-channel 24-bit sigma-delta DAC with headphone driver amplifier, and audio PLL to support a wide range of sample rates.
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