It consists of 1channel high speed, 10-bit, video digital-to-analog converter (VDAC) with composite output. The DAC is based on voltage output architecture with video band filter buffer with lower power consumption.
To combine 3 channel VDACs, they can also realize HD application with complementary outputs.
Adjustable swing registers make output swing can be trimmed from -51% to +51% with each step of 1.7%.
With building-in plug detection circuits, VDAC can sense output if used and be power down itself automatically.
- 1 channels 10-bit video DAC with SD video filter.
- Clock rate up to 108MHz for SD video applications.
- Support 297MHz clock input with complementary 3 channels VDACs to realize HD video applications.
- 1.7% per step adjustable registers for output swing level.
- Built in plug-in detection without additional PINs.
- 0.5V ~ 3.1V voltage output without AC coupling capacitors.
- Internal reference without external resisters or capacitors.
- 0.83V biasing voltage is needed for common mode voltage.
- INL < 2LSB and DNL < 1LSB
- Low power dissipation (typical 120mW)
- Low power standby mode (typical 0.4mW)
- Video broadcast systems
- High resolution color graphics
- Image processing
- Video signal reconstruction
- General purpose high-speed digital-to-analog conversion
Block Diagram of the 10-Bit High Speed Video DAC IP Core