The Xelic 10Gb/s I.4 Enhanced Forward Error Correction (EFEC) Core (XCO2EFEC4) generates codeword parity bits and performs error detection and correction for OTN OTU2 frames. The XCO2EFEC4 contains independent encoder and decoder functions with interleaved BCH and Reed Solomon algorithms. The XCO2EFEC4 is compliant with the G975.1.I.4 specification and has been through extensive interoperability testing. Corrected and Uncorrected codeword detection is provided along with configurable High BER status information. Line and system side data is transferred at an OTU2 rate using a 64-bit data bus operating at 167.33MHz.