Chevin Technology's 10G LL MAC/PCS IP combines the XG MAC, Ultra Low- Latency 10-Gbit/s Ethernet MAC and XG PCS, PCS/PMA to optimize integration and performance of Ultra Low-Latency Ethernet connectivity in Xilinx FPGAs.
Designed to IEEE 802.3-2008; IEEE 802.3ae-2002 specifications, 10GBASE-R, the 10G LL MAC/PCS provides Ultra Low-Latency Ethernet connectivity with a RTT of 160 nanoseconds.
Get up and running quickly with the reference design on an AlphaData ADMPCIE KU3, or a Xilinx KC705 development board and a simple “ping” command line with the ICMP/ARP options. Use standard software TCP/UDP tools when integrated with the XGTCP IP block from Chevin Technology’s portfolio of IP blocks.
- Ultra-Low Latency: 160 nanosecond packet Round Trip Time (RTT) in 7 Sreies, Kintex & Virtex® UltraScale™
- Cut-through mode operation for minimum latency
- Deficit Idle Count / Programmable IFG– Minimize IFG
- Designed to IEEE 802.3-2008; IEEE 802.3ae-2002 specifications, 10GBASE-R
- Fault Management, BER monitoring
- Small Footprint; Combined 5100 LUTs & 2 Block RAMs
- Statistics counters for frames and bytes sent/received, size bins, FCS errors, broadcast
- Reference design available for Alpha Data's ADM-PCIE-KU3, ADM-PCIE-8V3, ADM-PCIE-9V3 boards.
- Significantly increase the efficiency and rate of data transfer by providing lowest possible latency.
- Straightforward integration of 10Gbit/s Ethernet connectivity in Xilinx 7 Series, Kintex & Virtex® UltraScale™ FPGAs.
- Cut-through mode operation minimizes latency
- Store-and-forward feature allows for minimum application load
- Competitively priced licenses available to suit the size and requirements of each project.
- Customers can evaluate the RTT for themselves using a bitfile on Chevin Technology’s eco-system partner Alpha Data’s ADM-PCIE-KU3, ADM-PCIE-8V3, ADM-PCIE-9V3 boards.
- Encrypted RTL/VHDL source code for simulation
- Encrypted compiled netlist
- Datasheet & User Guide to assist integration
- Simulation Test bench
- Build scripts for Vivado
- Support for integration into FPGA
- Trade execution & monitoring
- Data Storage & Capture systems
- HPC / Big Data systems
- Signal processing systems
- Data Mining
Block Diagram of the 10G LL MAC/PCS IP Core