The 10Gbps 32-bit Ethernet IP solution offers a fully integrated IEEE802.3-2008 (802.3ae) compliant package for NIC (Network Interface Card) and Ethernet switching applications. This extremely low latency solution is specifically targeted for demanding financial, high frequency trading and HPC applications.
- Implements the full 802.3 specification with preamble/SFD generation, frame padding generation, CRC generation and checking on transmit and receive respectively.
- Implements 802.3bd specification with ability to generate and recognize PFC pause frames.
- Implements reconciliation sublayer functionality with start and terminate control characters alignment, error control character and fault sequence insertion and detection.
- Multiple user interface options for the MAC data path; AXI-4 streaming or Avalon Streaming; 32-bit data path 312.5MHz or 64-bit data path 156.25MHz
- PCS layer XGMII interface implemented as 64-bit (single data rate) SDR interface at 156.25MHz for direct interface to 10GBase-R, XAUI and RXUAI cores
- Deficit Idle Count (DIC) mechanism to ensure data rates of 10Gbps at the transmit interface.
- Optional padding of frames if the size of frame is less than 64 bytes.
- Implements fully automated XON and XOFF Pause Frame (802.3 Annex 31A) generation and termination providing flow control without user application intervention. Non PFC Mode only.
- Pause frame generation additionally controllable by user application offering flexible traffic flow control.
- Support for VLAN tagged frames according to IEEE 802.1Q.
- Support any type of Ethernet Frames such as SNAP / LLC, Ethernet II/DIX or IP traffic.
- Discards frames with mismatching destination address on receive (except Broadcast and Multicast frames).
- Programmable Promiscuous mode support to omit MAC destination address checking on receive path.
- Optional multicast address filtering with 64-bit HASH Filtering table providing imperfect filtering to reduce load on higher layers.
- CRC-32 generation and checking at high speed using Galois field multipliers and alternate polynomials.
- Programmable frame maximum length providing support for any standard or proprietary frame length (e.g. 9K-Bytes Jumbo Frames).
- Optional internal XGMII Loop-back.
- low logic utilization
- Extremely low latency Tx=41.6ns; Rx=76.8ns