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Switching regulator, inductor-based, PWM mode, high efficiency, DELTA standard
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112G XSR Multi-protocol SerDes PHY
A high-bandwidth, ultra-low power SerDes PHY solution for extremely short reach (XSR) 112G inter-die connections in system in package (SiP) devices serving next-generation networking and hyperscale data center applications.
The Rambus 112G XSR Multi-Protocol SerDes (MPS) PHY is a comprehensive IP solution designed to provide best-in-class performance for the high-bandwidth connections between die or chiplets in SiP devices. The 112G MPS PHY supports PAM-4 and NRZ signaling and data rates from 25 to 112 Gbps. It is tailored for the ultra-low power and area requirements of die-to-die interfaces.
The 112G XSR MPS PHY is designed with a system-oriented approach, maximizing flexibility in today’s most challenging system environments including specifically:
Die-to-die (D2D) interfaces
Die-to-optical engine (D2OE) interfaces
Available in advanced 7nm FinFET process.
The Rambus 112G XSR Multi-Protocol SerDes (MPS) PHY is a comprehensive IP solution designed to provide best-in-class performance for the high-bandwidth connections between die or chiplets in SiP devices. The 112G MPS PHY supports PAM-4 and NRZ signaling and data rates from 25 to 112 Gbps. It is tailored for the ultra-low power and area requirements of die-to-die interfaces.
The 112G XSR MPS PHY is designed with a system-oriented approach, maximizing flexibility in today’s most challenging system environments including specifically:
Die-to-die (D2D) interfaces
Die-to-optical engine (D2OE) interfaces
Available in advanced 7nm FinFET process.
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Block Diagram of the 112G XSR Multi-protocol SerDes PHY IP Core
