12 / 10 / 8-bit Reconfigurable SAR ADC 1.7MS/s (12-bit Mode) 2.8MS/s (8-bit Mode)
For application flexibility, this IP includes a Reference Buffer to drive the SAR ADC capacitive DAC.
The input signal sampling time is controlled externally, making this ADC extremely flexible and able to interface with multiple blocks with different output driving strengths. A calibration algorithm enhances the ADC performance.
During calibration, analog inputs are kept in high impedance, therefore relaxing the requirements for the block driving the ADC.
As a 12-bit ADC, it features an outstanding dynamic performance including 63.6dB SNR, 76.0dB SFDR and 10.2-bit ENOB. It also features an outstanding static performance with < ±0.9 LSB DNL (no missing-codes) and < ±1.5 LSB INL. At 1.7MS/s sampling rate, the power dissipation is ultra low, including the Reference Buffer.
The S3ADS2M12BT22ULL can be cost-effectively ported to other process.
View 12 / 10 / 8-bit Reconfigurable SAR ADC 1.7MS/s (12-bit Mode) 2.8MS/s (8-bit Mode) full description to...
- see the entire 12 / 10 / 8-bit Reconfigurable SAR ADC 1.7MS/s (12-bit Mode) 2.8MS/s (8-bit Mode) datasheet
- get in contact with 12 / 10 / 8-bit Reconfigurable SAR ADC 1.7MS/s (12-bit Mode) 2.8MS/s (8-bit Mode) Supplier
Block Diagram of the 12 / 10 / 8-bit Reconfigurable SAR ADC 1.7MS/s (12-bit Mode) 2.8MS/s (8-bit Mode)

12-bit IP
- 12-bit 500MS/s Dual Channel IQ ADC
- 20GSa/s 12-Bit Analogue-to-Digital Converter (ADC)
- 12-Bit 1 MS/s DAC with voltage output
- Hardware 12-bit MJPEG Codec IP
- Scalable UHD JPEG Encoder − Ultra-High Throughput, 8/10/12-bit per component and CBR video encoding
- Ultra-low-power 12-bit SAR ADC with lowest voltage