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12-bit 16-channel 1 MSPS R/2R DAC
The 16 channels 12-bit R/2R DAC contains a three principal blocks: adjustable bias, DAC core and logic block. DAC core consist of 16 identical R/2R DAC, each of which include differential R/2R ladder and output operational amplifier AB class. There is a possibility to turn off each output channels and whole scheme Digital control register adj<15:4> sets optimal mode by reducing current consumption. It corrects output buffers current, common mode and swing output signal. DAC requires 1.62 ÷ 1.98 V (port Vdd18) analog supply and 0.9 ÷ 1.1 V (port Vdd) digital supply.
Features
- TSMC 90 nm MS CMOS
- R/2R architecture
- Resolution 12 bit
- 1 MHz sampling rate
- Different power supplies for digital (1.0 V) and analog (1.8 V) parts
- Standby mode (current consumption <650 nA)
- 11.9 mW power dissipation
- 0.74 LSB maximum differential nonlinearity
- 1.20 LSB maximal integrated nonlinearity
- 278 ns time setup
- Small area
- Supported foundries: TSMC, UMC, Global Foundries, SMIC
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Applications
- Industrial process control
- Automated test equipment
- Digital calibration
- Data acquisition systems
- Motion control systems
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