12-bit 320MS/s ADC or 160MS/s I/Q ADC
High-Speed SAR ADC IP.
This ADC can work as single channel up to 320MS/s or
dual channel for I/Q conversion up to 160MS/s per
channel. The sampling rate can scale down to 1MS/s with
the power consumption scaling with the frequency.
This ADC features an excellent dynamic performance
including -75.0dB THD, 63.5dB SNR and 10.2-bit ENOB
(including References circuitry noise contribution). It also
features an excellent isolation between channels
< -75.0dB Crosstalk.
This high-end performance is obtained with an ultra
compact die area of 0.18mm2 and dissipating a mere
25mW for the complete IP working at 320MS/s.
Features
- TSMC 40nm LP (Low Power Process)
- No Analog Options
- 1.1V Core & 1.8V I/O Supplies
- 12-bit High-Speed SAR ADC
- Programmable for Single or Dual Channel (I/Q) Mode
- Max Sampling Rate:
- Single-Channel: 320MS/s
- Dual-Channel: 160MS/s per I/Q Channel
- 320MS/s to 1MS/s Sampling Rate Range with Scaling
- Power Consumption
- Internal Bandgap and Biasing System Included
- All required Voltage References Included
- No External Accurate Reference required
- No External Reference Decoupling required
- Good Power-Supply Noise Rejection
- Differential Input Signal Range: 1.0Vppdiff
- Outstanding Dynamic Performance:
- 75.0dB SFDR
- -75.0dB THD
- 63.5dB SNR
- 63.1dB SNDR
- 10.2-bit ENOB
- [Noise integrated up-to Nyquist]
- Outstanding Cross-Channel Performance:
- < -75.0dB Crosstalk between Channels
- Power-Down and Idle (Low Power) Modes
- Fast Wake-up Time from Idle Mode
- Ultra Low Power Dissipation:
- Only 25mW at 320MS/s Sampl. Rate
- Ultra Compact Die Area: Only 0.18mm2
Benefits
- The S3ADS320M12BT40LPC does not require any
- special analog options, and can be cost-effectively ported
- across foundries and process nodes upon request.
Deliverables
- Datasheet
- Characterization Report
- Flat Netlist (cdl)
- Layout View (gds2)
- Abstract View (lef)
- Timing View (lib)
- Behavioural Model (Verilog)
- Integration Support
Applications
- Connected Consumer Devices
- 802.11ac
- LTE
- DVB
- Home Network
- Wireless & Wireline Communications Infrastructure
- Wireline Communications
Block Diagram of the 12-bit 320MS/s ADC or 160MS/s I/Q ADC

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