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12-Bit 450MS/s Current Steering DDS DAC
The 12-bit 450MS/s DAC IP employs a current steering architecture with differential current outputs and features an excellent static performance and reduced output glitch energy. The distortion at the DAC output is also greatly reduced by using a proprietary latch design.
The combination of static performance, reduced glitch energy, minimized parasitics and reduced distortion, results in outstanding dynamic performance over a wide range of conditions, including frequencies close to the DAC Nyquist frequency.
Dynamic performance highlights for this 12-bit 450MS/s DAC considering a signal frequency of 10MHz and 450MS/s conversion rate include a SNDR > 62dB and a SFDR > 68dBc.
The 12-Bit 450MS/s Current Steering DDS DAC is designed in a 65nm logic process, which is ideal for integration with a DSP engine, and can be cost-effectively ported across foundries and process nodes upon request.
The combination of static performance, reduced glitch energy, minimized parasitics and reduced distortion, results in outstanding dynamic performance over a wide range of conditions, including frequencies close to the DAC Nyquist frequency.
Dynamic performance highlights for this 12-bit 450MS/s DAC considering a signal frequency of 10MHz and 450MS/s conversion rate include a SNDR > 62dB and a SFDR > 68dBc.
The 12-Bit 450MS/s Current Steering DDS DAC is designed in a 65nm logic process, which is ideal for integration with a DSP engine, and can be cost-effectively ported across foundries and process nodes upon request.
Features
- 65nm TSMC Logic LP Process
- No Analog Options
- 2.5V and 1.2V Supplies
- Sampling Rate up to 450MS/s
- 1.0Vpp Differential Output Range
- Programmable Full-Scale Current: 4 to 20mA
- Performance at 424MS/s
- SNDR >62dB, SFDR > 68dBc, FOUT = 10MHz
- SNDR >57dB, SFDR > 52dBc, FOUT = 90MH
- MTPR >50dB up to 95MHz @ PAPR=17dB
- Stand-By and Power-Down Modes
- Compact Die Area
Applications
- omePlug
- G.hn
- PLC
Block Diagram of the 12-Bit 450MS/s Current Steering DDS DAC
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