The 12-bit 54MS/s Pipeline ADC is a low-power ADC IP operating up to 54MS/s. This 12-bit ADC features an excellent static performance that includes ±0.5LSB DNL and ±2.5LSB INL typ.
Dynamic performance highlights considering an input signal with 30MHz frequency and 54MS/s sampling rate, include SNR of 60dB, SFDR of 68dB, yielding 9.5ENOB performance.
Auxiliary circuits comprising a bandgap, frequencydependent current biasing and voltage reference buffers with internal decoupling are also included. The ADC does not require any special analog options, and can be cost-effectively ported across foundries and process nodes upon request.
- TSMC 40nm General Purpose Process
- No Analog Options
- 2.0V Analog Power Supply
- 12-Bit Pipeline ADC
- Sampling Rate up to 54MS/s
- 1Vpp Differential Input Range
- DNL ±0.5LSB Typ.
- INL ±2.5LSB Typ.
- Only 50mW at 54MS/s
- 60dB SNR @ fin= 30MHz and 54MS/s
- 68dB SFDR @ fin= 30MHz and 54MS/s
- 9.5ENOB @ fin= 30MHz and 54MS/s
- Stand-by and Power Down Modes
- Compact Die Area
Block Diagram of the 12-bit 54MS/s Pipeline ADC IP Core