A block is a pipelined ADC, built on a 12 1.5-bit multiplying DAC with sample data storage device and the final block of comparators. Multiplying DAC consists of 5 blocks mdac1, 7 blocks mdac2. Blocks mdac1, mdac2 different power operational amplifier and the nominal resistance of the keys. Mdac1 blocks have the potential to change the level of comparison, in blocks mdac2 have fixed level comparisons. Block mdac consists of an operational amplifier, a set of keys, performing switching capacitabces and the operational amplifier, comparators, clock generator and voltage divider to generate the reference level. Comparator generates key control signals for switching capacitances, output signals for further processing logic code generation ADC clock signal switching key management capacities, clock signals for the circuit to ensure the necessary level of common-mode operational amplifier. In the module supply voltage divider values of resistors and filter capacitances define power of operational amplifier, which forms the reference levels.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.